Table 514. Writing To A Register - STMicroelectronics SPC572L series Reference Manual

RM0400
All register access is performed via the SELECT-DR-SCAN path. The Nexus state machine
defaults to the register select state when enabled. Accessing a register requires two passes
through the SELECT-DR-SCAN path: one pass to select the register and the second pass to
read/write the register.
The first pass through the SELECT-DR-SCAN path is used to enter an 8-bit Nexus
command consisting of a read/write control bit in the LSB followed by a 7-bit register
address index, as illustrated in
and 0 for reads. The current value of the Controller Command Input is captured into the
IEEE 1149.1 shifter during the CAPTURE-DR state while the Nexus controller state machine
is in the REG_SELECT state.
The second pass through the SELECT-DR-SCAN path is used to read or write the register
data by shifting in the data (LSB first) during the SHIFT-DR state. When reading a register,
the current register value is loaded into the IEEE 1149.1 shifter during the CAPTURE-DR
state. When writing a register, the value is loaded from the IEEE 1149.1 shifter to the
register during the UPDATE-DR state. When reading a register, there is no requirement to
shift out the entire register contents. Shifting may be terminated once the required number
of bits have been acquired.
Table 514
Clock TMS IEEE 1149.1 State
0 0 RUN-TEST/IDLE
1 1 SELECT-DR-SCAN
2 0 CAPTURE-DR
3 0 SHIFT-DR
12 1 EXIT1-DR
13 1 UPDATE-DR
14 1 SELECT-DR-SCAN
15 0 CAPTURE-DR
16 0 SHIFT-DR
48 1 EXIT1-DR
49 1 UPDATE-DR
50 0 RUN-TEST/IDLE
Figure 457. IEEE 1149.1 controller command input
MSB
7-bit register index
illustrates a sequence which writes a 32-bit value to a register.

Table 514. Writing to a register

Nexus state
REG_SELECT IEEE 1149.1 controller in idle state
REG_SELECT First pass through SELECT-DR-SCAN path
REG_SELECT
REG_SELECT
7 TCKs
REG_SELECT Last bit of register index shifted into TDI
REG_SELECT Controller decodes and selects register
DATA_ACCESS Second pass through SELECT-DR-SCAN path
DATA_ACCESS Internal shifter loaded with current value of register
DATA_ACCESS TDO becomes active, and outputs current value of
31 TCKs
DATA_ACCESS
DATA_ACCESS Value written to register
REG_SELECT
DocID027809 Rev 4
GTM Development Interface (GTMDI)
Figure 457. The read/write control bit is set to 1 for writes
Internal shifter loaded with current value of controller
command input
TDO becomes active, and write bit and 6 bits of register
index shifted in
register while new value is shifted in through TDI
Last bit of current value shifted out TDO. Last bit of new
value shifted in TDI
Controller returned to idle state. It could also return to
SELECT-DR-SCAN to write another register
LSB
R/W
Description
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