Integrator - STMicroelectronics SPC572L series Reference Manual

Decimation Filter
Access to input and output buffers remain operational in freeze, as well as their related
flags.
37.4.13

Integrator

The hardware sample integrator accumulates the filter output values for determined periods.
37.4.13.1 Integrator inputs
The integrator can be fed either by raw or decimated filter outputs, selected by the
DECFILTER_MXCR bit SISEL (see
Configuration Register
the filtered sample "as is" (signaled), or its absolute value, depending on the
DECFILTER_MXCR register bit SSIG.
Note: The integrator accumulates input samples when bypass is selected.
37.4.13.2 Integrator outputs
The integrator output is either:
•
the 32-bit, fixed point unsigned accumulation of the absolute values from the filter
output, when the integrator is configured for absolute operation (DECFILTER_MXCR
bit SSIG=0). This resolution allows a minimum of 131071 samples to be integrated
before an overflow occurs in absolute operation, or 65536 samples in signed operation.
•
the 32-bit, fixed point signed two's complement accumulation of the signed values from
the filter output, when the integrator is configured for signed operation (SSIG=1).
The fractional part of the accumulation is 15 bits wide in both cases.
An accumulation overflow is flagged by the DECFILTER_MXSR bit SSOVF. The
accumulator can overflow in either of the ways below, selected through the
DECFILTER_MXCR bit SSAT:
• saturated accumulation (SSAT=1), so that an overflow results in the value of
0xFFFFFFFF for absolute value accumulation (SSIG=0), or 0x7FFFFFFF (positive)
and 0x80000000 (negative) for signaled accumulation (SSIG=1).
•
non-saturated accumulation (SSAT=0), so that an overflow results in the modulo 2
accumulation value. This operation is only allowed in absolute accumulation (SSIG=0).
The integrator output value becomes available in register DECFILTER_FINTVAL (see
Section 37.3.2.9: Decimation Filter Final Integration Value register
when an integrator output request is issued. The integrator output request can be issued in
the following ways:
•
by hardware, controlled by an external signal ; the enabling and the selection of the
signal request modes is done through the DECFILTER_MXCR field SRQSEL (see
Section 37.3.2.3: Decimation Filter Module Extended Configuration Register
(DECFILTER_MXCR));
• by software, writing 1 to the DECFILTER_MXCR bit SRQ;
The SSOVF flag is asserted upon an integrator output request, based on the overflow state
of the internal accumulator. This internal overflow state is cleared upon an output request,
just after SSOVF is asserted, or upon an integrator reset (see
reset). The internal overflow state is also cleared by writing SSOVFC to 1, but only in
saturated accumulation. Therefore, a non-saturated overflow that occurs before an SSOVF
clear is still flagged in the next output request.
836/2058
Section 37.3.2.3: Decimation Filter Module Extended
(DECFILTER_MXCR)). The accumulated input value taken can be
DocID027809 Rev 4
RM0400
(DECFILTER_FINTVAL))
Section 37.4.13.3: Integrator
17