46.3.6 Dspi Dma/Interrupt Request Select And Enable Register (Dspi_Rser - STMicroelectronics SPC572L series Reference Manual

Deserial Serial Peripheral Interface (DSPI)
Field
Receive FIFO Overflow Flag.
Indicates an overflow condition in the RX FIFO. The bit is set when the RX FIFO and shift register
12
are full and a transfer is initiated.
RFOF
0 No Rx FIFO overflow.
1 Rx FIFO overflow has occurred.
Transmit FIFO Invalid Write Flag.
Indicates Data Write on TX FIFO while CMD FIFO is empty. Without a Command, the Data
13
entries present in TXFIFO are invalid.
TFIWF
0 No Invalid Data present in TX FIFO
1 Invalid Data present in TX FIFO since CMD FIFO is empty
Receive FIFO Drain Flag.
Provides a method for the DSPI to request that entries be removed from the RX FIFO. The bit is
set while the RX FIFO is not empty.
14
The RFDF bit can be cleared by writing 1 to it or by acknowledgement from the DMA controller
RFDF
when the RX FIFO is empty.
0 Rx FIFO is empty.
1 Rx FIFO is not empty.
Command FIFO Fill Flag.
Provides a method for the DSPI to request more entries to be added to the CMD FIFO. The
CMDFFF bit is set while the CMD FIFO is not full.
15
The CMDFFF is cleared by writing a '1' to it or by acknowledgement from the DMA controller to
CMDFFF
the CMD FIFO full request.
0 CMD FIFO is full.
1 CMD FIFO is not full.
TX FIFO Counter.
16–19 Indicates the number of valid entries in the TX FIFO.
TXCTR The TXCTR is incremented every time the data part of PUSHR is written.
The TXCTR is decremented every time the SPI data is transferred to the shift register.
Transmit Next Pointer.
20–23
Indicates which TX FIFO Entry is transmitted during the next transfer.
TXNXTPTR
The TXNXTPTR field is updated every time SPI data is transferred from the TX FIFO to the shift
register.
RX FIFO Counter.
24–27 Indicates the number of entries in the RX FIFO.
RXCTR The RXCTR is decremented every time the POPR is read.
The RXCTR is incremented every time data is transferred from the shift register to the RX FIFO.
Pop Next Pointer.
28–31
Contains a pointer to the RX FIFO entry to be returned when the POPR is read.
POPNXTPTR
The POPNXTPTR is updated when the POPR is read.
46.3.6 DSPI DMA/Interrupt Request Select and Enable Register (DSPI_RSER)
The DSPI_RSER controls DMA and interrupt requests.
Do not write to the RSER while the DSPI is in the Running state.
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Table 617. DSPI_SR field descriptions(Continued)
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Description
RM0400