STMicroelectronics SPC572L series Reference Manual page 981

RM0400
Offset
Measured position stamp of last but one
0x285F4/ 0x285F0
STATE input (PSSM_old)
Number of pulses of current increment in
0x285F8
normal mode for SUB_INC1 (NMB_T)
Number of pulses of current increment in
emergency mode for
0x285FC
SUB_INC1 (NMB_S)
DPLL RAM Region 1c (0.75 KB for 256 words of 24 bits)
Note: The following registers for the signal STATE are located in RAM Region 1c, read
access by AEI via bus interface possible, writing results in an interrupt; data width of 3 bytes
used for 24-bit values.
1c1
Nominal STATE reciprocal values in
FULL_SCALE
0x28600 + n*0x0004
(RDT_Sn), n = 0...63 (2*(SNU+1-SYN_NS)
valid entries)
1c2
Time stamp field of STATE Events
0x28700 +
(TSF_Sm), m = 0...63 (2*(SNU+1) valid
m*0x0004
entries)
1c3
Adapt Values for all STATE Increments
0x28800 + n*0x0004
(ADT_Sn), n = 0...63 (2*(SNU+1-SYN_NS)
valid entries)
1c4
Nominal STATE Increment Values for
FULL_SCALE
0x28900 +
m*0x0004
(DT_Sm), m = 0...63 (2*(SNU+1-SYN_NS)
valid entries)
0x28A00 – 0x28DFC
Calculated ACTION_n TIME STAMP
0x28E00 + n*0x0004
(DPLL_TSACn), n = 0...31
Calculated position value for action n
0x28E80 + n*0x0004
(DPLL_PSACn), n = 0...31
0x28F00 control bits for actions 0...3 (DPLL_ACB_0)
0x28F04 control bits for actions 4...7 (DPLL_ACB_1)
0x28F08 control bits for actions 8....11 (DPLL_ACB_2)
control bits for actions 12...15
0x28F0C
(DPLL_ACB_3)
control bits for actions 16...19
0x28F10
(DPLL_ACB_4)
Table 516. GTMINT module memory map(Continued)
Use
DocID027809 Rev 4
GTM101 Integration (GTMINT) Module
Access Reset value
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R 0x0000_0000
Reserved
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
(1)
Location
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
2
See GTM Spec.
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