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Analog-to-digital converter (ADC) configuration
Name
SARADC0_ICIMR0
SARADC0_WTISR
SARADC0_WTIMR
SARADC0_DMAE
SARADC0_ICDSR0
SARADC0_
WTHRHLR0–
WTHRHLR3
726/2058
Table 353. SAR ADC0 register definitions(Continued)
0
1
2
3
16
17
18
19
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
R
0
0
0
0
W
DocID027809 Rev 4
27
5
6
7
8
20
21
22
23
24
0
0
0
0
0
0
0
0
w1
w1
c
c
0
0
0
0
0
0
0
0
0
w1
c
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
w1
w1
c
c
9
10
11
12
13
25
26
27
28
29
0
0
0
0
0
w1
w1
w1
w1
w1
c
c
c
c
c
0
0
0
0
0
w1
w1
w1
w1
w1
c
c
c
c
c
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
w1
w1
w1
w1
w1
c
c
c
c
c
THRH
THRL
RM0400
14
15
30
31
0
0
w1
w1
c
c
0
0
w1
w1
c
c
0
0
0
0
0
0
w1
w1
c
c
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