STMicroelectronics SPC572L series Reference Manual page 898

GTM Development Interface (GTMDI)
Table 467. GTMDI_ATOM_WPC2 field descriptions(Continued)
Field
Watchpoint Trigger Output Selection 2. The WTSEL2[2:0] field selects among 8 available
Watchpoint trigger outputs which one is connected to the ATOM selected channel. Other modules
can selected the same WTSEL2 value, in this case the result signal is an OR of all selected
sources.
000 SHARED_WPT[0]
14–12
001 SHARED_WPT[1]
WTSEL2 010 SHARED_WPT[2]
011 SHARED_WPT[3]
100 SHARED_WPT[4]
101 SHARED_WPT[5]
110 SHARED_WPT[6]
111 SHARED_WPT[7]
Start/Stop input signal selection 2. Selects the Start/Stop input that is used for the watchpoint
message control. These signals are actually a pair of signals.
5–4
00 SHARED_WPT_ST[0]
STSEL2 01 SHARED_WPT_ST[1]
10 SHARED_WPT_ST[2]
11 SHARED_WPT_ST[3]
Watchpoint Trigger Enable 2. The TEN2 field controls if a Watchpoint external trigger is issued by
1 the selected ATOM channel.
TEN2 0 Disable Trigger Generation
1 Enable Trigger Generation
Start/Stop Enable 2. The SEN2 bit field enables the Start/Stop inputs of the GTMDI to control
Watchpoint trace messages generated by the ATOM selected channel. If this bit is cleared, the
0 messages are controlled only by JTAG writes to the WMC2 field in the GTMDI_ATOM_WPC1
register.
SEN2
0 Disable trace control from Start/Stop inputs
1 Enable trace control from Start/Stop inputs
42.5.1.10 SPEA watchpoint control 1 register 1 (GTMDI_SPEA_WPC1)
The GTMDI_SPEA_WPC1 register shown in
issued by SPEA channels. These triggers are used for GTM to enter Halt state, generate
watchpoint messages and to control logic outside of the GTMDI module, such as SPU
interface.
Note: Start/Stop signals inputs to the GTMDI can overwrite the state of the WMC1 and WMC2
control bits thus controlling the Watchpoint messages behavior. In case of JTAG modifies
the WMC1 or WMC2 bits and Start/Stop signals occur at the same time also modifying the
same bits, Start/Stop signals have precedence over JTAG writes. The SEN1 and SEN2
control bits from the GTMDI_SEP0_WPC2 register need to be set in order to allow external
Start/Stop signals to control the WMC1/2 bits.
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Description
Figure 415
DocID027809 Rev 4
controls the Watchpoint Triggers
RM0400