STMicroelectronics SPC572L series Reference Manual page 679

RM0400
Field
Memory 2 Single-Bit Correction Event
This field is initialized by hardware reset.
Write '1' to clear this field.
8
Write '1' to clear this field also deasserts the corresponding interrupt notification if
SBC2
ERM_CR[ESCIE2] is enabled.
0 No single-bit correction event on Memory 2 detected
1 Single-bit correction event on Memory 2 detected
Note: Refer to the device configuration chapter for details on Memory 2 mapping.
Memory 2 Non-Correctable Error Event
This field is initialized by hardware reset.
Write '1' to clear this field also deasserts the corresponding interrupt notification if
9
ERM_CR[ENCIE2] is enabled.
NCE2
0 No non-correctable error event on Memory 2 detected
1 Non-correctable error event on Memory 2 detected
Note: Refer to the device configuration chapter for details on Memory 2 mapping.
Memory 12 Single-Bit Correction Event
This field is initialized by hardware reset.
Write '1' to clear this field.
12
Write '1' to clear this field also deasserts the corresponding interrupt notification if
SBC3
ERM_CR[ESCIE3] is enabled.
0 No single-bit correction event on Memory 3 detected
1 Single-bit correction event on Memory 3 detected
Note: Refer to the device configuration chapter for details on Memory 3 mapping.
Memory 3 Non-Correctable Error Event
This field is initialized by hardware reset.
Write '1' to clear this field also deasserts the corresponding interrupt notification if
13
ERM_CR[ENCIE3] is enabled.
NCE3
0 No non-correctable error event on Memory 3 detected
1 Non-correctable error event on Memory 3 detected
Note: Refer to the device configuration chapter for details on Memory 3 mapping.
Memory 4 Single-Bit Correction Event
This field is initialized by hardware reset.
Write '1' to clear this field.
16
Write '1' to clear this field also deasserts the corresponding interrupt notification if
SBC4
ERM_CR[ESCIE4] is enabled.
0 No single-bit correction event on Memory 4 detected
1 Single-bit correction event on Memory 4 detected
Note: Refer to the device configuration chapter for details on Memory 4 mapping.
Memory 4 Non-Correctable Error Event
This field is initialized by hardware reset.
Write '1' to clear this field also deasserts the corresponding interrupt notification if
17
ERM_CR[ENCIE4] is enabled.
NCE4
0 No non-correctable error event on Memory 4 detected
1 Non-correctable error event on Memory 4 detected
Note: Refer to the device configuration chapter for details on Memory 4 mapping.
Table 330. ERM_SR field descriptions(Continued)
DocID027809 Rev 4
Error Reporting Module (ERM)
Description
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