Register Descriptions - STMicroelectronics SPC572L series Reference Manual

GTM Development Interface (GTMDI)
MCSB Data Trace Address Range 2 (GTMDI_MCSB_DTAR2)
Reserved
TBU0 Watchpoint Control 1 (GTMDI_TBU0_WPC1)
TBU0 Watchpoint Control 2 (GTMDI_TBU0_WPC2)
TBU0 DATA (GTMDI_TBU0_DATA)
Reserved
TBU1 Watchpoint Control 1 (GTMDI_TBU1_WPC1)
TBU1 Watchpoint Control 2 (GTMDI_TBU1_WPC2)
TBU1 DATA (GTMDI_TBU1_DATA)
Reserved
TBU2 Watchpoint Control 1 (GTMDI_TBU2_WPC1)
TBU2 Watchpoint Control 2 (GTMDI_TBU2_WPC2)
TBU2 DATA (GTMDI_TBU2_DATA)
42.5.1

Register descriptions

This section consists of GTMDI register descriptions. The registers are shown in
The MCS cores selected for debugging are named MCSA and MCSB thus two MCS cores
can be debugged at the same time. See registers GTMDI_MCSA_DC and
GTMDI_MCSB_DC which specify the real number of the MCS associated with MCSA and
MCSB.
42.5.1.1 Device identity register (DID)
The DID register contains the unique identification information as shown in
Register index: 0
31 30
R Part Revision Number
W
RESET DID_PRN
15 14
R Part Identification Number
W
RESET DID_PIN (contd)
Table 459
880/2058
Table 458. GTMDI registers(Continued)
Register
29 28 27 26
13 12 11 10
Figure 406. Device identity register (DID)
describes the device identification register functions.
DocID027809 Rev 4
25 24 23 22
Design Center
DID_DC
9 8 7 6
Manufacturer Identity Code
DID_MIC
Index Read/write
89
90–93
94
95
96
97–100
101
102
103
104–107
108
109
110
Table
Figure
21 20 19 18
Part Identification Number
DID_PIN
5 4 3 2
RM0400
R/W
—
R/W
R/W
R/W
—
R/W
R/W
R/W
—
R/W
R/W
R/W
458.
406.
17 16
1 0
1
1