Figure 373. Fourth Order Iir Filter Implementation Block Diagram - STMicroelectronics SPC572L series Reference Manual

Decimation Filter
Equation 19
Where all the coefficients are scaled down by S. The block diagram for
shown in
B are called coefficient n, where n=0-8.
i
FIR Section
x(n)
-1
Z
Tap0
-1
Z
Tap1
-1
Z
Tap2
-1
Z
Tap3
The fourth order IIR filter is implemented with a FIR section followed by an IIR section. If the
FIR type filter mode is selected, the IIR section is converted into an FIR section. In this case
the order of the FIR filter is twice the IIR filter order, since all the TAP and coefficient
registers are allocated for the FIR section. The Filter configuration paths are shown in
Figure 374. Multiplexer A controls the bypass filter path and multiplexer B controls/selects
the filter mode of operation, to either IIR mode or FIR mode. The selection is controlled by
the FTYPE[1:0] bits in the Filter Module Configuration register. The order of the filter can be
controlled by setting the appropriate filter coefficients to zero.
830/2058
Figure 373 in a fourth-order IIR filter implementation where the coefficients A

Figure 373. Fourth Order IIR Filter Implementation Block Diagram

Coefficient 0
Coefficient 1
Coefficient 2
Coefficient 3
Coefficient 4
DocID027809 Rev 4

N
B

i

y n ( ) ---- - x n i – (
= S

S


i = 0
+ +

M
A

j

) ---- - y n j – ( )
+

S


j = 1
Equation 19
IIR Section
Scale Factor S
-1
Z
Coefficient 5 Tap4
-1
Z
Coefficient 6 Tap5
-1
Z
Coefficient 7 Tap6
-1
Z
Coefficient 8 Tap7
RM0400
is
and
j
y(n)