Figure 540. Interprocessor Communication Diagram - STMicroelectronics SPC572L series Reference Manual

RM0400
DEVICE 1
Shared
Memory
*Channel 0 has the highest priority for transmission, and Channel 2 is the only channel that is
capable of data streaming.

Figure 540. Interprocessor communication diagram

S
I
LFAST
P
I
SIPI Module
Channel 0
Channel 1
Channel 2*
Channel 3
DocID027809 Rev 4
Serial Interprocessor Interface (SIPI)
DEVICE 2
S
I
LFAST
P
I
Shared
Memory
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