Dspi Dsi Serialization Source Select Register 1 (Dspi_Ssr1) - STMicroelectronics SPC572L series Reference Manual

RM0400
Field
0–31
Deserialized Data
DESER_DATA
46.3.25

DSPI DSI Serialization Source Select Register 1 (DSPI_SSR1)

SSR1 is used to create a combined frame for transmission that contains bits from ASDR1
and from SDR1.
Each bit in the SSR1 register selects a corresponding bit to be serialized.
When DSICR0[TXSS] is set, the SSR1 register value has no effect.
The concatenation of {DSPI_SSR1, DSPI_SSR0} provides the 64-bit Serialization Source
Select Value.
This register is valid only when DSICR1[DSI64E] is enabled.
Address: Base + 0x0100
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Figure 608. DSPI DSI Serialization Source Select Register (DSPI_SSR)
Field
Source Select
0–31
0The bit in the transmitted frame is taken from the parallel input pin.
SS
1The bit in the transmitted frame is taken from the ASDR1 register
46.3.26 DSPI DSI Deserialized Data Interrupt Mask Register 1 (DSPI_DIMR1)
DIMR1 selects bits from the 32 MSB in the received 64-bit DSI frame to be checked to
generate the DDI interrupt.
The concatenation of {DSPI_DIMR1, DSPI_DIMR0} provides the 64-bit Deserialized Data
Interrupt Mask Value.
This register is valid only when DSICR1[DSI64E] is enabled.
Table 636. DSPI_DDR1 field descriptions
2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0
Table 637. DSPI_SSR field descriptions
DocID027809 Rev 4
Deserial Serial Peripheral Interface (DSPI)
Description
6 7 8 9
SS
0 0 0 0
22 23 24 25
SS
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
14 15
0 0
30 31
0 0
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