STMicroelectronics SPC572L series Reference Manual page 811

RM0400
Table 420. DECFILTER_MCR field descriptions(Continued)
Field
Input Data Interrupt Enable
The IDEN bit enables the Decimation Filter to generate interrupt requests on all new input data
7
written to the Interface Input Buffer register or Input/Output Buffers register.
IDEN
1 Input Data Interrupt Enabled
0 Input Data Interrupt Disabled
Output Data Interrupt Enable
The ODEN bit enables the Decimation Filter to generate interrupt requests on all new data
8
written to the filter Output buffer.
ODEN
1 Output Data Interrupt Enabled
0 Output Data Interrupt Disabled
Error Interrupt Enable
The ERREN bit enables the Decimation Filter to generate interrupt requests based on the
9
assertion of the DECFILTER_MSR register error flags OVF, DIVR, SVR, OVR or IVR.
ERREN
1 Error Interrupts Enabled
0 Error Interrupts Disabled
10 Reserved
Filter Type Selection bits
The FTYPE[1:0] bits select the filter type according to the following values:
00 Filter Bypass
01 IIR Filter - 1 x 4th order
11-12
10 FIR Filter - 1 x 8th order
FTYPE[1:0]
11 reserved
Note: In Bypass configuration the filter is disabled.
Note: Bypass must not be configured when in cascade mode (see field CASCD).
13 Reserved
Filter Scaling Factor
The SCAL[1:0] bit field selects the scaling factor used by the filter algorithm according to the
following values:
14-15
00 Scaling Factor = 1
SCAL[1:0]
01 Scaling Factor = 4
10 Scaling Factor = 8
11 Scaling Factor = 16
Input Disable
The IDIS bit disables the block input, so that writes to the input buffer have no effect (from the
device slave-bus), and input DMA or interrupt requests are not issued.
0 Input disabled
16
1 Input enabled
IDIS
Note: IDIS resets in 1 (hardware reset only), and the module configuration procedures for
previous versions (without IDIS bit) are upward compatible provided that the
DECFILTER_MCR register is written with 0 into the IDIS position (previously reserved).
DocID027809 Rev 4
Description
Decimation Filter
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