Tx Handling - STMicroelectronics SPC572L series Reference Manual

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restarted. The DMA request is activated only when all three debug messages A, B, C have
been received in correct order.
The status of the debug message handling state machine is signaled via RXF1S.DMS.
T0: reset m_cam_dma_req output, enable reception of debug messages A, B, and C
T1: reception of debug message A
T2: reception of debug message A
T3: reception of debug message C
T4: reception of debug message B
T5: reception of debug messages A, B
T6: reception of debug message C
T7: DMA transfer completed
T8: reception of debug message A,B,C (message rejected)
44.3.13

Tx handling

The Tx Handler handles transmission requests for the dedicated Tx Buffers, the Tx FIFO,
and the Tx Queue. It controls the transfer of transmit messages to the CAN core, the Put
and Get Indices, and the Tx Event FIFO. Up to 32 Tx Buffers can be set up for message
transmission. The Tx Buffer element is described in
The Tx Handler starts a Tx scan to check for the highest priority pending Tx request (Tx
Buffer with lowest Message ID) when the Tx Buffer Request Pending register TXBRP is
updated, or when a transmission has been started.
Note: AUTOSAR requires at least three Tx Queue Buffers and support of transmit cancellation.
44.3.13.1 Dedicated Tx Buffers
Dedicated Tx Buffers are intended for message transmission under complete control of the
Host CPU. Each Dedicated Tx Buffer is configured with a specific Message ID. In case that
multiple Tx Buffers are configured with the same Message ID, the Tx Buffer with the lowest
buffer number is transmitted first.
Figure 526. Debug Message Handling State Machine
DocID027809 Rev 4
Section 44.3.6.2: Tx buffer
CAN Subsystem
element.
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