Table 496. Gtmdi_Tbu0_Wpc1 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

GTM Development Interface (GTMDI)
Field
TBU0 Watchpoint 1 Compare Selection. The TSS1[2:0] field controls the type of comparison used
for TBU0 watchpoint generation.
000 TBU0 24-bit update (do not compare data)
001 TBU 27-bit update (do not compare data)
30–28
010 Compare TBU0 value in 24-bit mode with expected data
TSS1 011 Compare TBU0 value in 27-bit mode with expected data
100 Reserved
101 Reserved
110 Reserved
111 Reserved
Halt Enable 1. The HEN1 Halt Enable 1 bit controls if the TBU0 event is enabled to HALT the GTM
module. If this bit is set and an event occurs on the TBU0 a Halt signal is generated to the GTM
23
which enters debug state.
HEN1
0 Disables Halt GTM
1 Enables Halt GTM
Watchpoint Message Control 1. The WMC1 Watchpoint Message Control 1 bit controls the
watchpoint message sent through the Message Data bus. If this bit is set it enables valid matches
22 or increment on selected TBU0 to generate a watchpoint message. This bit is written by the JTAG
interface but can also be controlled at SoC level with dedicated Start/Stop signals inputs to GTMDI.
WMC1
0 Watchpoint Messages disabled
1 Watchpoint Messages enabled
TBU0 Watchpoint 2 Compare Selection 2. The TSS2[2:0] field controls the type of comparison used
for TBU0 watchpoint generation.
000 TBU0 24-bit update (do not compare data)
001 TBU 27-bit update (do not compare data)
14–12
010 Compare TBU0 value in 24-bit mode with expected data
TSS2 011 Compare TBU0 value in 27-bit mode with expected data
100 Reserved
101 Reserved
110 Reserved
111 Reserved
Halt Enable 2. The HEN2 Halt Enable 2 bit controls if the TBU0 valid event, which is a match or
increment, is enabled to HALT the GTM module. If this bit is set and an event occurs on the TBU0,
7
a Halt signal is generated to the GTM which enters Halt state.
HEN2
0 Disables Halt GTM
1 Enables Halt GTM
Watchpoint Message Control 2. The WMC2 Watchpoint Message Control 2 bit controls the
watchpoint message sent through the Message Data bus. If this bit is set it enables match or
increment on TBU0 to generate a watchpoint message. This bit is written by the JTAG interface but
6
can also be controlled at SoC level with dedicated Start/Stop signals inputs to GTMDI.
WMC2
0Watchpoint Messages disabled
1 Watchpoint Messages enabled
1. Only bits from 26 to 3 from register GTMDI_TBU0_DATA are used for comparison
932/2058

Table 496. GTMDI_TBU0_WPC1 field descriptions

DocID027809 Rev 4
Description
(1)
1
RM0400