Table 327. Sample Low And Mid Address Space Flash Block Bit Mapping - STMicroelectronics SPC572L series Reference Manual

Flash Memory Programming and Configuration
2. If no DCF records have been written to change the lock state, the bit will reset to '1'.
Assume four passwords have been previously implemented.
Following is an example of a mapping of flash blocks to Read Locking groups.

Table 327. Sample low and mid address space flash block bit mapping

Start Address End Address
0x0040_4000 0x0040_7FFF
0x00FC_0000 0x00FC_3FFF
0x00FC_4000 0x00FC_7FFF
0x00FC_8000 0x00FC_BFFF
0x00FC_C000 0x00FC_FFFF
0x00FD_0000 0x00FD_7FFF
0x00FD_8000 0x00FD_FFFF
0x00FE_0000 0x00FE_FFFF
0x00FF_0000 0x00FF_FFFF
0x0040_0000 0x0040_3FFF
To provide two level of password protection for only Read Lock group 3 and leave all other
groups unlocked, the RL3 bit can be set in any two of the four PASS_LOCK3_PGn registers.
For this example, we will choose password groups 0 and 1.
We need to create DCF records that define the reset values for all RLn bits as 0, with the
exception of PASS_LOCK3_PG0 and PASS_LOCK3_PG1. The information required is from
the PASS section of
(DCF) Records.
DCF CS[14:0]
000_0000_0000_1000
000_0000_0000_1000
000_0000_0000_1000
000_0000_0000_1000
668/2058
Example 16. Implementing secure read protection
Size LOCKn
Register Field
(KB) Register
16 0 LOCK0 LOWLOCK[0]
16 0 LOCK0 LOWLOCK[1]
16 0 LOCK0 LOWLOCK[2]
16 1 LOCK0 LOWLOCK[3]
16 1 LOCK0 LOWLOCK[4]
32 0 LOCK0 LOWLOCK[6]
32 1 LOCK0 LOWLOCK[7]
64 0 LOCK0 LOWLOCK[8]
64 0 LOCK0 LOWLOCK[9]
16 0 LOCK0
Table 71: DCF client list
DCF address [16:2] (binary)
000_0000_0100_0011
000_0000_0100_0111
000_0000_0100_1011
000_0000_0100_1111
DocID027809 Rev 4
LOCKn
LOCKn DCF
Record
Bit DATA
Bit
16
17
18
19
20
22
23
24
25
TSLOCK 31
in Chapter 8: Device Configuration Format
RM0400
Read
Bloc
Lock Description
k No.
group
— 0 BAF
1 1 Code Flash
1 2 Code Flash
1 3 Code Flash
1 4 Code Flash
1 6 Code Flash
1 7 Code Flash
1 8 Code Flash
1 9 Code Flash
0 32 UTEST
DCF client description
LOCK3_PG0
LOCK3_PG1
LOCK3_PG2
LOCK3_PG3