STMicroelectronics SPC572L series Reference Manual page 588

Flash memory controller (PFLASH Controller)
controller treats the 32 available calibration region descriptors (CRD0–CRD31) as a
replicated group of 16 region descriptors. More specifically:
•
The contents of CRD0 are expected to be redundantly defined in CRD16
•
The contents of CRD1 are expected to be redundantly defined in CRD17
•
The contents of CRD2 are expected to be redundantly defined in CRD17
•
...and so on
•
The contents of CRD15 are expected to be redundantly defined in CRD31
Note: It is the user's responsibility to establish redundant calibration region descriptors by
programming the associated pairs of CRDs.
Incoming flash read requests are compared simultaneously against the calibration regions
defined in CRD0–15 and the calibration regions defined in CRD16–31. Due to the enabled
redundancy, the parallel overlay remap hardware structures should evaluate to symmetric
results. If a mismatch is detected, the event is reported to the FCCU and calibration
remapping is not performed. Instead, data is returned from the flash.
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