Table 480. Gtmdi_Aru_Data0H Field Descriptions - STMicroelectronics SPC572L series Reference Manual

Table of Contents

Advertisement

GTM Development Interface (GTMDI)
Field
28–0
DATA0H
42.5.1.23 ARU watchpoint DATA0L register (GTMDI_ARU_DATA0L)
The ARU Watchpoint DATA0H low word shown in
the low word of the ARU Debugging Channel 0. The address for the channel to be
monitored is defined by the Host CPU in the GTM IP ARU_DBG_ACCESS0 register.
Register index: 53
31
30
R
0
0
W
RESET:
0
0
15
14
R
W
RESET:
0
0
Table 481
Field
28–0
DATA0L
42.5.1.24 ARU watchpoint DATA1H register (GTMDI_ARU_DATA1H)
The ARU Watchpoint DATA1H high word shown in
against the high word of the ARU Debugging Channel 1. The address for the channel to be
monitored is defined by the Host CPU in the GTM IP ARU_DBG_ACCESS1 register.
Register index: 54
31
30
R
0
0
W
RESET:
0
0
15
14
R
W
RESET:
0
0
916/2058

Table 480. GTMDI_ARU_DATA0H field descriptions

Watchpoint DATA0H. This field is compared against the high word of the ARU Debugging
Channel 0.
29
28
27
26
0
0
0
0
0
13
12
11
10
0
0
0
0
Figure 428. ARU watchpoint DATA0L register (GTMDI_ARU_DATA0L)
describes the GTMDI_ARU_DATA0L register functions.
Table 481. GTMDI_ARU_DATA0L field descriptions
Watchpoint DATA0L. This field is compared against the low word of the ARU Debugging
Channel 0.
29
28
27
26
0
0
0
0
0
13
12
11
10
0
0
0
0
Figure 429. ARU watchpoint DATA1H register (GTMDI_ARU_DATA1H)
Description
Figure 428
25
24
23
22
DATA0L[28:16]
0
0
0
9
8
7
DATA0L[15:0]
0
0
0
Description
Figure
25
24
23
22
DATA1H[28:16]
0
0
0
9
8
7
DATA1H[15:0]
0
0
0
DocID027809 Rev 4
is used for comparison against
21
20
19
0
0
0
0
6
5
4
3
0
0
0
0
429. is used for comparison
21
20
19
0
0
0
0
6
5
4
3
0
0
0
0
RM0400
18
17
16
0
0
0
2
1
0
0
0
0
18
17
16
0
0
0
2
1
0
0
0
0

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the SPC572L series and is the answer not in the manual?

Table of Contents