Input Data Calculation - STMicroelectronics SPC572L series Reference Manual

RM0400
SCALE
COEFn
Coef0 = B0/S
Coef1 = B1/S
Coef2 = B2/S
Coef3 = B3/S
Coef4 = B4/S
Coef5 = –A1/S
Coef6 = –A2/S
Coef7 = –A3/S
Coef8 = –A4/S
37.6.2

Input data calculation

The 24-bit words of input data are samples of a sum of two tones: one tone of 30 kHz and
another tone of 250 kHz. The samples were calculated at the rate of 800k samples per
second. The tones have the same amplitude and it is assured that the resultant amplitude is
smaller than '1' so as to obtain samples in the range (–1 ≤ sample < +1). It is supposed the
input data are signed values in the two's complement format in the range (1 ≤ sample < +1).
37.6.3 Filter results
The decimation filter block was used in a Verilog simulator using the calculated coefficients
and the input data samples. A scaling factor of eight in the configuration register
DECFILTER_MCR, and no decimation factor, were used to obtain the maximum of output
results from the filter.
The theoretical expected values from this filter were also calculated, and these results were
compared with those from the decimation filter. The resultant RMS error when considering
about 500 samples was about –97 dB.
Table 433. Coefficient values for decimation filter
S=1
Decimal Value
0.0221455
0.00445582948893748
0.0318517846509088
0.00445582948893748
0.0221455
2.69772868375858
–3.234056294853
1.92028561712454
–0.47939080709495
DocID027809 Rev 4
S=8
Decimal Value
0.00276815891266
0.00055694580078
0.00398147106171
0.00055694580078
0.00276815891266
0.33721613883972
–0.40425717830658
0.24003565311432
–0.05992400646210
Decimation Filter
Hexadecimal Values
(24 bits)
0x005AB5
0x001240
0x008277
0x001240
0x005AB5
0x2B29E6
0xCC414E
0x1EB97D
0xF8546A
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