Figure 305. Sigma-Delta Adc Clock Diagram - STMicroelectronics SPC572L series Reference Manual

RM0400
34.2.1.4 Sigma-Delta ADC clock sources
The Sigma-Delta ADC digital interface on the SPC572Lx has a register clock input, which is
separate from the module clock input. The register interface is clocked by the
PBRIDGEn_CLK. The module clock is sourced by the modulator clock (SD_CLK). See the
Clocking chapter for more detail on the clock sources. The input clock for the Sigma-Delta
modulator is the SD_CLK.
ADC clock architecture. See
The frequency range for the SD_CLK is 4–16 MHz. Both the analog and digital blocks of the
ADC contain an internal clock mux for external modulator mode. The external modulator
clock (CLKEXT) can be input to the device, or generated from SD_CLK from the CGM. The
pad input/output settings in the corresponding SIUL2 MSCR pad control registers determine
the external modulator clock source to the ADC blocks. The CLKEXT pins are multiplexed
on multiple external pins on the device. Selection of the CLKEXT pin to use for the external
modulator clock for each ADC is done in the SIUL2 MSCR input multiplexing registers. The
Sigma-Delta ADC has three external pins to select from for an external modulator clock.
PBRIDGE_0_CLK
XOSC
IRCOSC
PLL0
34.2.1.5 Sigma-Delta ADC starting/triggering
The Sigma-Delta ADC on SPC572Lx supports starting the converter with a software write to
an enable bit in a register in the digital interface.
34.2.1.6 Sigma-Delta ADC external modulator
34.2.1.6.1 External modulators
The Sigma-Delta ADC supports an interface to external Sigma-Delta modulators. In this
mode, the Sigma-Delta ADC internal modulator is disabled, and a serial bit stream from an
external modulator is clocked into the back-end digital filters of the on-chip Sigma-Delta
Figure 305
Section 21.6.4: Sigma-Delta ADC

Figure 305. Sigma-Delta ADC clock diagram

CGM
SD_CLK
.
1–128
.
DocID027809 Rev 4
Analog-to-digital converter (ADC) configuration
gives a block diagram of the required Sigma-Delta
SIUL2 MSCR
External Package Pins
clocking.
biu
SD3
Digital
adc
ext. mod
SD3
Analog
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