Table 453. Pitx_Cvaln Field Descriptions - STMicroelectronics SPC572L series Reference Manual

Periodic Interrupt Timer (PIT)
41.2.1.5 PIT Module x Current Timer Value Register n (PITx_CVALn)
Address: Base + 0x0104
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Figure 397. PIT Module x Current Timer Value Register n (PITx_CVALn)
Field
Current Timer Value
If the timer is enabled, these bits represent the current timer value. If the timer is disabled, do not
0–31
use this field as its value is unreliable.
TVL
Note: The timer uses a down counter. The timer values are frozen in debug mode if the MCR[FRZ]
41.2.1.6 PIT Module x Timer Control Register n (PITx_TCTRLn)
Address: Base + 0x0108
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
864/2058
2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0

Table 453. PITx_CVALn field descriptions

bit is set.
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0 0
0 0 0 0
Figure 398. Timer Control Register (PITx_TCTRLn)
DocID027809 Rev 4
6 7 8 9
TVL
0 0 0 0
22 23 24 25
TVL
0 0 0 0
Description
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0 0 0
0 0 0 0
Access: User read-only
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
0 0 0
CHN
0 0 0 0
RM0400
14 15
0 0
30 31
0 0
14 15
0 0
0 0
30 31
TIE TEN
0 0