STMicroelectronics ST10 Series Programming Manual
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STMicroelectronics ST10 Series Programming Manual

STMicroelectronics ST10 Series Programming Manual

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ST10
FAMILY PROGRAMMING MANUAL
Ref: ST10FPM
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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  • Page 1 ST10 FAMILY PROGRAMMING MANUAL Ref: ST10FPM This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

  • Page 3: Table Of Contents

    ST10 FAMILY PROGRAMMING MANUAL TABLE OF CONTENTS Page INTRODUCTION ......................STANDARD INSTRUCTION SET................ADDRESSING MODES....................2.1.1 Short adressing modes....................2.1.2 Long addressing mode ....................2.1.3 DPP override mechanism .................... 2.1.4 Indirect addressing modes ..................2.1.5 Constants ........................2.1.6 Branch target addressing modes................. INSTRUCTION EXECUTION TIMES ................
  • Page 4 ST10 FAMILY PROGRAMMING MANUAL 2/172...

  • Page 5: Introduction

    ST10 ST10 FAMILY PROGRAMMING MANUAL 1 - INTRODUCTION This programming manual details the instruction specific instructions when reading executable set for the ST10 family of products. The manual is code i.e. during the de-bugging phase. Finally, arranged in two sections. Section 1 details the each instruction is described individually on a standard instruction set and includes all of the page of standard format, using the conventions...

  • Page 6: Standard Instruction Set

    ST10 FAMILY PROGRAMMING MANUAL 2 - STANDARD INSTRUCTION SET the low byte (for byte operations) of an SFR can 2.1 - Addressing Modes be addressed via 'reg'. Note that the high byte of 2.1.1 - Short adressing modes an SFR cannot be accessed by the 'reg' address- ing mode.

  • Page 7: Long Addressing Mode

    ST10 FAMILY PROGRAMMING MANUAL 2.1.2 - Long addressing mode All ST10 devices support an address space of up to 16MByte, so only the lower ten bits of the Long addressing mode uses one of the four DPP selected DPP register content are concatenated registers to specify a physical 18-bit or 24-bit with the 14-bit data page offset to build the physi- address.

  • Page 8: Dpp Override Mechanism

    ST10 FAMILY PROGRAMMING MANUAL 2.1.3 - DPP override mechanism Word accesses on odd byte addresses are not executed, but rather trigger a hardware trap. override mechanism temporarily After reset, the DPP registers are initialized in a bypasses the DPP addressing scheme. The way that all indirect long addresses are directly EXTP(R) and EXTS(R) instructions override this mapped onto the identical physical addresses.

  • Page 9: Constants

    ST10 FAMILY PROGRAMMING MANUAL The following indirect addressing modes are pro- cated to match the data format required for the vided: operation: Table 3 : Table of indirect address modes Table 4 : Table of constants Mnemonic Notes Mnemonic Word operation Byte operation [Rw] Most instructions accept any GPR...

  • Page 10: Instruction Execution Times

    ST10 FAMILY PROGRAMMING MANUAL caddr For further information on the relation between trap numbers and interrupt or trap sources, refer Specifies an absolute 16-bit code address within to the device user manual section on “Interrupt the current segment. Branches MAY NOT be and Trap Functions”.

  • Page 11: Definition Of Measurement Units

    ST10 FAMILY PROGRAMMING MANUAL 2.2.1 - Definition of measurement units The following measurement units are used to define instruction processing times: CPU operating frequency (may vary from 1MHz to 80MHz). [State]: One state time is specified by one CPU clock period. Therefore, one State is used as the basic time unit, because it represents the shortest period of time which has to be considered for instruction timing evaluations.

  • Page 12: Minimum State Times

    ST10 FAMILY PROGRAMMING MANUAL 2.2.2 - Minimum state times they were fetched from the internal ROM, plus an instruction-length dependent number of state The table below shows the minimum number of times, as follows: state times required to process an instruction fetched from the internal ROM ( T Imin (ROM)).
  • Page 13 ST10 FAMILY PROGRAMMING MANUAL Internal RAM operand reads via indirect addressing modes: T Iadd = 0 or 1 State Reading a GPR or any other directly addressed operand within the internal RAM space does NOT cause additional state time. However, reading an indirectly addressed internal RAM operand will extend the pro- cessing time by 1 state time, if the preceding instruction auto-increments or auto-decrements a GPR, as shown in the following example: : MOV R1, [R0+]...
  • Page 14 ST10 FAMILY PROGRAMMING MANUAL Jumps into the internal ROM space: T Iadd = 0 or 2 States The minimum time of 4 state times for standard jumps into the internal ROM space will be extended by 2 additional state times, if the branch target instruction is a double word instruction at a non-aligned double word location (xxx2h, xxx6h, xxxAh, xxxEh), as shown in the following example: label : ..

  • Page 15: Instruction Set Summary

    ST10 FAMILY PROGRAMMING MANUAL 2.3 - Instruction set summary The following table lists the instruction mnemonic by hex-code with operand. Table 7 : Instruction mnemonic by hex-code with operand JMPR cc, rel BCLR BITaddrQ.q BSET BITaddrQ.q 13/172...
  • Page 16 ST10 FAMILY PROGRAMMING MANUAL Table 8 lists the instructions by their mnemonic and identifies the addressing modes that may be used with a specific instruction and the instruction length, depending on the selected addressing mode (in bytes). Table 8 : Mnemonic vs address mode & number of bytes Mnemonic Addressing Modes Bytes...

  • Page 17: Instruction Set Ordered By Functional Group

    ST10 FAMILY PROGRAMMING MANUAL Table 8 : Mnemonic vs address mode & number of bytes (continued) Mnemonic Addressing Modes Bytes Mnemonic Addressing Modes Bytes MOVBS , Rb TRAP #trap7 MOVBZ reg, mem ATOMIC #data mem, reg EXTR EXTS , #data EXTP , #data EXTSR...
  • Page 18 ST10 FAMILY PROGRAMMING MANUAL Branch condition codes cc: Symbolically specifiable condition codes cc_UC Unconditional cc_NE Not Equal cc_Z Zero cc_ULT Unsigned Less Than cc_NZ Not Zero cc_ULE Unsigned Less Than or Equal cc_V Overflow cc_UGE Unsigned Greater Than or Equal cc_NV No Overflow cc_UGT...
  • Page 19 ST10 FAMILY PROGRAMMING MANUAL Table 9 : Arithmetic instructions (continued) Mnemonic Description ADDCB Rb, Rb Add direct byte GPR to direct GPR with Carry ADDCB Rb, [Rw] Add indirect byte memory to direct GPR with Carry ADDCB Rb, [Rw+] Add indirect byte memory to direct GPR with Carry and post-increment source pointer by 1 ADDCB Rb, #data...
  • Page 20 ST10 FAMILY PROGRAMMING MANUAL Table 9 : Arithmetic instructions (continued) Mnemonic Description SUBB reg, mem Subtract direct byte memory from direct register SUBB mem, reg Subtract direct byte register from direct memory SUBC Rw, Rw Subtract direct word GPR from direct GPR with Carry SUBC Rw, [Rw] Subtract indirect word memory from direct GPR with Carry...
  • Page 21 ST10 FAMILY PROGRAMMING MANUAL Table 10 : Logical instructions (continued) Mnemonic Description ANDB Rb, [Rw+] Bitwise AND indirect byte memory with direct GPR and post-increment source pointer by 1 ANDB Rb, #data Bitwise AND immediate byte data with direct GPR ANDB reg, #data Bitwise AND immediate byte data with direct register...
  • Page 22 ST10 FAMILY PROGRAMMING MANUAL Table 11 : Boolean bit map instructions (continued) Mnemonic Description BAND AND direct bit with direct bit 12 4 bitaddr, bitaddr BCLR bitaddr Clear direct bit BCMP Compare direct bit to direct bit 12 4 bitaddr, bitaddr BFLDH Bitwise modify masked high byte of bit-addressable direct 12 4...
  • Page 23 ST10 FAMILY PROGRAMMING MANUAL Table 12 : Compare and loop instructions (continued) Mnemonic Description CMPD1 Rw, #data Compare immediate word data to direct GPR and decrement GPR by 1 CMPD1 Rw, #data Compare immediate word data to direct GPR and decrement GPR by 1 CMPD1 Rw, mem...
  • Page 24 ST10 FAMILY PROGRAMMING MANUAL Table 14 : Shift and rotate instructions (continued) Mnemonic Description ASHR Rw, Rw Arithmetic (sign bit) shift right direct word GPR; number of shift cycles specified by direct GPR ASHR Rw, #data Arithmetic (sign bit) shift right direct word GPR; number of shift cycles specified by immediate data Rw, Rw Rotate left direct word GPR;...
  • Page 25 ST10 FAMILY PROGRAMMING MANUAL Table 15 : Data movement instructions (continued) Mnemonic Description Rw, [Rw+ #data Move indirect word memory by base plus constant to direct GPR [Rw+ #data ], Rw Move direct word GPR to indirect memory by base plus constant [Rw], mem Move direct word memory to indirect memory...
  • Page 26 ST10 FAMILY PROGRAMMING MANUAL Table 16 : Jump and Call Instructions (continued) Mnemonic Description CALLA cc, caddr Call absolute subroutine if condition is met 10/8 10/8 14/12 CALLI cc, [Rw] Call indirect subroutine if condition is met CALLR Call relative subroutine CALLS seg, caddr Call absolute subroutine in any code segment bitaddr, rel Jump relative if direct bit is set...
  • Page 27 ST10 FAMILY PROGRAMMING MANUAL Table 19 : System Control Instructions (continued) Mnemonic Description ATOMIC #data Begin ATOMIC sequence DISWDT Disable Watchdog Timer EINIT Signify End-of-Initialization on RSTOUT-pin EXTR #data Begin EXTended Register sequence EXTP Rw, #data Begin EXTended Page sequence EXTP #pag, #data Begin EXTended Page sequence...

  • Page 28: Instruction Set Ordered By Opcodes

    ST10 FAMILY PROGRAMMING MANUAL 2.5 - Instruction set ordered by opcodes 00xx.xxxx: EXTS ATOMIC The following pages list the instruction set ordered 10xx.xxxx: EXTSR EXTR by their hexadecimal opcodes. This is used to 11xx.xxxx: EXTPR identify specific instructions when reading execut- able code, i.e.
  • Page 29 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand ADDC reg, mem ADDCB reg, mem ADDC mem, reg ADDCB mem, reg ADDC reg, #data ADDCB reg, #data ADDC , [Rw +] or Rw , [Rw...
  • Page 30 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand SUBC mem, reg SUBCB mem, reg SUBC reg, #data SUBCB reg, #data SUBC , [Rw +] or Rw , [Rw ] or Rw , #data SUBCB...
  • Page 31 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand reg, #data XORB reg, #data , [Rw +] or Rw , [Rw ] or Rw , #data XORB , [Rw +] or Rb , [Rw ] or Rb...
  • Page 32 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand , [Rw +] or Rw , [Rw ] or Rw , #data , [Rw +] or Rb , [Rw ] or Rb , #data BXOR...
  • Page 33 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand bitaddr , rel TRAP #trap7 JMPI cc, [Rw JMPR cc_NC, rel or cc_UGE, rel BCLR bitaddr BSET bitaddr CMPD1 , #data NEGB CMPD1...
  • Page 34 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand ASHR , #data JMPR cc_SLE, rel BCLR bitaddr Q.11 BSET bitaddr Q.11 MOVBZ , Rb MOVBZ reg, mem , CoReg CoSTORE +#data ], Rw...
  • Page 35 ST10 FAMILY PROGRAMMING MANUAL Table 21 : Instruction set ordered by Hex code (continued) Hex- code Number of Bytes Mnemonic Operand BCLR bitaddr Q.13 BSET bitaddr Q.13 , #data MOVB , #data PCALL reg, caddr MOVB +#data ], Rb reg, #data MOVB reg, #data ], [Rw...

  • Page 36: Instruction Conventions

    ST10 FAMILY PROGRAMMING MANUAL 2.6 - Instruction conventions summarized at the end of each single instruction description. This section details the conventions used in the individual instruction descriptions. Each individual 2.6.3 - Operation instruction description is described in a standard The following symbols are used to represent data format in separate sections under the following movement, arithmetic or logical operators (see...

  • Page 37: Data Types

    ST10 FAMILY PROGRAMMING MANUAL 2.6.4 - Data types for those of the branch instructions which do not access any explicitly addressed data. Specifies the particular data type according to the instruction. Basically, the following data types are 2.6.5 - Description used: BIT, BYTE, WORD, DOUBLEWORD Describes the operation of the instruction.

  • Page 38: Flags

    ST10 FAMILY PROGRAMMING MANUAL 2.6.7 - Flags – For byte operations, the non-addressed byte is cleared and the addressed byte is overwritten. This section shows the state of the N, C, V, Z and E flags in the PSW register. The resulting state of –...

  • Page 39: Addressing Modes

    ST10 FAMILY PROGRAMMING MANUAL 2.6.8 - Addressing modes – Mnemonic gives an example of which operands Specifies available combinations of addressing the instruction will accept. modes. The selected addressing mode combina- – Format specifies the format of the instruction as tion is generally specified by the opcode of the corresponding instruction.

  • Page 40: Atomic And Extended Instructions

    ST10 FAMILY PROGRAMMING MANUAL Number of bytes Specifies the size of an instruc- be used with the ATOMIC and EXTended instruc- tion in bytes. All ST10 instructions are either 2 or 4 tions. bytes. Instructions are classified as either single CAUTION: When a Class B trap interrupts an word or double word instructions (see Figure 3).

  • Page 41: Instruction Descriptions

    ST10 FAMILY PROGRAMMING MANUAL 2.8 - Instruction descriptions This section contains a detailed description of each instruction, listed in alphabetical order. Integer Addition Syntax op1, op2 Operation (op1) <-- (op1) + (op2) WORD Data Types Description Performs a 2’s complement binary addition of the source operand specified by op2 and the destination operand specified by op1.
  • Page 42 ST10 FAMILY PROGRAMMING MANUAL ADDB Integer Addition Syntax ADDB op1, op2 Operation (op1) <-- (op1) + (op2) Data Types BYTE Description Performs a 2’s complement binary addition of the source operand specified by op2 and the destination operand specified by op1. The sum is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 43 ST10 FAMILY PROGRAMMING MANUAL ADDC Integer Addition with Carry Syntax ADDC op1, op2 Operation (op1) <-- (op1) + (op2) + (C) Data Types WORD Description Performs a 2’s complement binary addition of the source operand specified by op2, the destination oper- and specified by op1 and the previously generated carry bit.
  • Page 44 ST10 FAMILY PROGRAMMING MANUAL ADDCB Integer Addition with Carry Syntax ADDCB op1, op2 Operation (op1) <-- (op1) + (op2) + (C) Data Types BYTE Description Performs a 2’s complement binary addition of the source operand specified by op2, the destination oper- and specified by op1 and the previously generated carry bit.
  • Page 45 ST10 FAMILY PROGRAMMING MANUAL Logical AND Syntax op1, op2 Operation (op1) <-- (op1) ^ (op2) Data Types WORD Description Performs a bitwise logical AND of the source operand specified by op2 and the destination operand spec- ified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 46 ST10 FAMILY PROGRAMMING MANUAL ANDB Logical AND Syntax ANDB op1, op2 Operation (op1) <-- (op1) ^ (op2) Data Types BYTE Description Performs a bitwise logical AND of the source operand specified by op2 and the destination operand spec- ified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 47 ST10 FAMILY PROGRAMMING MANUAL ASHR Arithmetic Shift Right Syntax ASHR op1, op2 Operation (count) <-- (op2) <-- 0 <-- 0 DO WHILE (count) ≠ 0 <-- (C) v (V) <-- (op1 (op1 <-- (op1 [n=0...14] (count) <-- (count) - 1 END WHILE Data Types WORD...
  • Page 48 ST10 FAMILY PROGRAMMING MANUAL ATOMIC Begin ATOMIC Sequence Syntax ATOMIC [1 ≤ op1 ≤ 4] Operation (count) <-- (op1) Disable interrupts and Class A traps DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE) Next Instruction (count) <-- (count) - 1 END WHILE (count) = 0 Enable interrupts and traps...
  • Page 49 ST10 FAMILY PROGRAMMING MANUAL BAND Bit Logical AND Syntax BAND op1, op2 Operation (op1) <-- (op1) ^ (op2) Data Types Description Performs a single bit logical AND of the source bit specified by op2 and the destination bit specified by op1.
  • Page 50 ST10 FAMILY PROGRAMMING MANUAL BCLR Bit Clear Syntax BCLR Operation (op1) <-- 0 Data Types Description Clears the bit specified by op1. This instruction is primarily used for peripheral and system control. Flags Always cleared. Contains the logical negation of the previous state of the specified bit. Always cleared.
  • Page 51 ST10 FAMILY PROGRAMMING MANUAL BCMP Bit to Bit Compare Syntax BCMP op1, op2 Operation (op1) <--> (op2) Data Types Description Performs a single bit comparison of the source bit specified by operand op1 to the source bit specified by operand op2. No result is written by this instruction. Only the flags are updated. Flags Always cleared.
  • Page 52 ST10 FAMILY PROGRAMMING MANUAL BFLDH Bit Field High Byte Syntax BFLDH op1, op2, op3 Operation (tmp) <-- (op1) (high byte (tmp)) <-- ((high byte (tmp) ^ ¬op2) v op3) (op1) <-- (tmp) Data Types WORD Description Replaces those bits in the high byte of the destination word operand op1 which are selected by an ’1’ in the AND mask op2 with the bits at the corresponding positions in the OR mask specified by op3.
  • Page 53 ST10 FAMILY PROGRAMMING MANUAL BFLDL Bit Field Low Byte Syntax BFLDL op1, op2, op3 Operation (tmp) <-- (op1) (low byte (tmp)) <-- ((low byte (tmp) ^ ¬op2) v op3) (op1) <-- (tmp) Data Types WORD Description Replaces those bits in the low byte of the destination word operand op1 which are selected by an ’1’ in the AND mask op2 with the bits at the corresponding positions in the OR mask specified by op3.
  • Page 54 ST10 FAMILY PROGRAMMING MANUAL BMOV Bit to Bit Move Syntax BMOV op1, op2 Operation (op1) <-- (op2) Data Types Description Moves a single bit from the source operand specified by op2 into the destination operand specified by op1. The source bit is examined and the flags are updated accordingly. Flags Always cleared.
  • Page 55 ST10 FAMILY PROGRAMMING MANUAL BMOVN Bit to Bit Move & Negate Syntax BMOVN op1, op2 Operation (op1) <-- ¬(op2) Data Types Description Moves the complement of a single bit from the source operand specified by op2 into the destination oper- and specified by op1.
  • Page 56 ST10 FAMILY PROGRAMMING MANUAL Bit Logical OR Syntax op1, op2 Operation (op1) <-- (op1) v (op2) Data Types Description Performs a single bit logical OR of the source bit specified by operand op2 with the destination bit speci- fied by operand op1. The ORed result is then stored in op1. Flags Always cleared.
  • Page 57 ST10 FAMILY PROGRAMMING MANUAL BSET Bit Set Syntax BSET Operation (op1) <-- 1 Data Types Description Sets the bit specified by op1. This instruction is primarily used for peripheral and system control. Flags Always cleared. Contains the logical negation of the previous state of the specified bit. Always cleared.
  • Page 58 ST10 FAMILY PROGRAMMING MANUAL BXOR Bit Logical XOR Syntax BXOR op1, op2 <-- (op1) ⊕ (op2) Operation (op1) Data Types Description Performs a single bit logical EXCLUSIVE OR of the source bit specified by operand op2 with the destina- tion bit specified by operand op1. The XORed result is then stored in op1. Flags Always cleared.
  • Page 59 ST10 FAMILY PROGRAMMING MANUAL CALLA Call Subroutine Absolute Syntax CALLA op1, op2 Operation IF (op1) THEN (SP) <-- (SP) - 2 ((SP)) <-- (IP) (IP) <-- op2 ELSE next instruction END IF Description If the condition specified by op1 is met, a branch to the absolute memory location specified by the second operand op2 is taken.
  • Page 60 ST10 FAMILY PROGRAMMING MANUAL CALLI Call Subroutine Indirect Syntax CALLI op1, op2 Operation IF (op1) THEN (SP) <-- (SP) - 2 ((SP)) <-- (IP) (IP) <-- (op2) ELSE next instruction END IF Description If the condition specified by op1 is met, a branch to the location specified indirectly by the second operand op2 is taken.
  • Page 61 ST10 FAMILY PROGRAMMING MANUAL CALLR Call Subroutine Relative Syntax CALLR Operation (SP) <-- (SP) - 2 ((SP)) <-- (IP) (IP) <-- (IP) + sign_extend (op1) Description A branch is taken to the location specified by the instruction pointer, IP, plus the relative displacement, op1.
  • Page 62 ST10 FAMILY PROGRAMMING MANUAL CALLS Call Inter-Segment Subroutine Syntax CALLS op1, op2 Operation (SP) <-- (SP) - 2 ((SP)) <-- (CSP) (SP) <-- (SP) - 2 ((SP)) <-- (IP) (CSP) <-- op1 (IP) <-- op2 Description A branch is taken to the absolute location specified by op2 within the segment specified by op1. The value of the instruction pointer (IP) is placed onto the system stack.
  • Page 63 ST10 FAMILY PROGRAMMING MANUAL Integer Compare Syntax op1, op2 Operation (op1) <--> (op2) Data Types WORD Description The source operand specified by op1 is compared to the source operand specified by op2 by performing a 2’s complement binary subtraction of op2 from op1. The flags are set according to the rules of subtrac- tion.
  • Page 64 ST10 FAMILY PROGRAMMING MANUAL CMPB Integer Compare Syntax CMPB op1, op2 Operation (op1) <--> (op2) Data Types BYTE Description The source operand specified by op1 is compared to the source operand specified by op2 by performing a 2’s complement binary subtraction of op2 from op1. The flags are set according to the rules of subtrac- tion.
  • Page 65 ST10 FAMILY PROGRAMMING MANUAL CMPD1 Integer Compare & Decrement by 1 Syntax CMPD1 op1, op2 Operation (op1) <--> (op2) (op1) <-- (op1) - 1 Data Types WORD Description This instruction is used to enhance the performance and flexibility of loops. The source operand specified by op1 is compared to the source operand specified by op2 by performing a 2’s complement binary sub- traction of op2 from op1.
  • Page 66 ST10 FAMILY PROGRAMMING MANUAL CMPD2 Integer Compare & Decrement by 2 Syntax CMPD2 op1, op2 Operation (op1) <--> (op2) (op1) <-- (op1) - 2 Data Types WORD Description This instruction is used to enhance the performance and flexibility of loops. The source operand specified by op1 is compared to the source operand specified by op2 by performing a 2’s complement binary sub- traction of op2 from op1.
  • Page 67 ST10 FAMILY PROGRAMMING MANUAL CMPI1 Integer Compare & Increment by 1 Syntax CMPI1 op1, op2 Operation (op1) <--> (op2) (op1) <-- (op1) + 1 Data Types WORD Description This instruction is used to enhance the performance and flexibility of loops. The source operand specified by op1 is compared to the source operand specified by op2 by performing a 2’s complement binary sub- traction of op2 from op1.
  • Page 68 ST10 FAMILY PROGRAMMING MANUAL CMPI2 Integer Compare & Increment by 2 Syntax CMPI2 op1, op2 Operation (op1) <--> (op2) (op1) <-- (op1) + 2 Data Types WORD Description This instruction is used to enhance the performance and flexibility of loops. The source operand specified by op1 is compared to the source operand specified by op2 by performing a 2’s complement binary sub- traction of op2 from op1.
  • Page 69 ST10 FAMILY PROGRAMMING MANUAL Integer One’s Complement Syntax Operation (op1) <-- ¬(op1) Data Types WORD Description Performs a 1’s complement of the source operand specified by op1. The result is stored back into op1. Flags Set if the value of op1 represents the lowest possible negative number. Cleared otherwise. Used to signal the end of a table.
  • Page 70 ST10 FAMILY PROGRAMMING MANUAL CPLB Integer One’s Complement Syntax Operation (op1) <-- ¬(op1) Data Types BYTE Description Performs a 1’s complement of the source operand specified by op1. The result is stored back into op1. Flags Set if the value of op1 represents the lowest possible negative number. Cleared otherwise. Used to signal the end of a table.
  • Page 71 ST10 FAMILY PROGRAMMING MANUAL DISWDT Disable Watchdog Timer Syntax DISWDT Operation Disable the watchdog timer Description This instruction disables the watchdog timer. The watchdog timer is enabled by a reset. The DISWDT instruction allows the watchdog timer to be disabled for applications which do not require a watchdog function.
  • Page 72 ST10 FAMILY PROGRAMMING MANUAL 16-by-16 Signed Division Syntax Operation (MDL) <-- (MDL) / (op1) (MDH) <-- (MDL) mod (op1) Data Types WORD Description Performs a signed 16-bit by 16-bit division of the low order word stored in the MD register by the source word operand op1.
  • Page 73 ST10 FAMILY PROGRAMMING MANUAL DIVL 32-by-16 Signed Division Syntax DIVL Operation (MDL) <-- (MD) / (op1) (MDH) <-- (MD) mod (op1) Data Types WORD, DOUBLEWORD Description Performs an extended signed 32-bit by 16-bit division of the two words stored in the MD register by the source word operand op1.
  • Page 74 ST10 FAMILY PROGRAMMING MANUAL DIVLU 32-by-16 Unsigned Division Syntax DIVLU Operation (MDL) <-- (MD) / (op1) (MDH) <-- (MD) mod (op1) Data Types WORD, DOUBLEWORD Description Performs an extended unsigned 32-bit by 16-bit division of the two words stored in the MD register by the source word operand op1.
  • Page 75 ST10 FAMILY PROGRAMMING MANUAL DIVU 16-by-16 Unsigned Division Syntax DIVU Operation (MDL) <-- (MDL) / (op1) (MDH) <-- (MDL) mod (op1) Data Types WORD Description Performs an unsigned 16-bit by 16-bit division of the low order word stored in the MD register by the source word operand op1.
  • Page 76 ST10 FAMILY PROGRAMMING MANUAL EINIT End of Initialization Syntax EINIT Operation End of Initialization Description This instruction is used to signal the end of the initialization portion of a program. After a reset, the reset output pin RSTOUT is pulled low. It remains low until the EINIT instruction has been executed at which time it goes high.
  • Page 77 ST10 FAMILY PROGRAMMING MANUAL EXTP Begin EXTended Page Sequence Syntax EXTP op1, op2 [1 ≤ op2 ≤ 4] Operation (count) <-- (op2) Disable interrupts and Class A traps Data_Page = (op1) DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE) Next Instruction (count) <-- (count) - 1...
  • Page 78 ST10 FAMILY PROGRAMMING MANUAL EXTPR Begin EXTended Page & Register Sequence Syntax EXTPR op1, op2 [1 ≤ op2 ≤ 4] Operation (count) <-- (op2) Disable interrupts and Class A traps Data_Page = (op1) AND SFR_range = Extended DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE) Next Instruction (count) <-- (count) - 1 END WHILE...
  • Page 79 ST10 FAMILY PROGRAMMING MANUAL EXTR Begin EXTended Register Sequence Syntax EXTR [1 ≤ op1 ≤ 4] Operation (count) <-- (op1) Disable interrupts and Class A traps SFR_range = Extended DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE) Next Instruction (count) <-- (count) - 1 END WHILE...
  • Page 80 ST10 FAMILY PROGRAMMING MANUAL EXTS Begin EXTended Segment Sequence Syntax EXTS op1, op2 [1 ≤ op2 ≤ 4] Operation (count) <-- (op2) Disable interrupts and Class A traps Data_Segment = (op1) DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE) Next Instruction (count) <-- (count) - 1 END WHILE...
  • Page 81 ST10 FAMILY PROGRAMMING MANUAL EXTSR Begin EXTended Segment & Register Sequence Syntax EXTSR op1, op2 [1 ≤ op2 ≤ 4] Operation (count) <-- (op2) Disable interrupts and Class A traps Data_Segment = (op1) AND SFR_range = Extended DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE) Next Instruction (count) <-- (count) - 1...
  • Page 82 ST10 FAMILY PROGRAMMING MANUAL IDLE Enter Idle Mode Syntax IDLE Operation Enter Idle Mode Description This instruction causes the part to enter the idle mode. In this mode, the CPU is powered down while the peripherals remain running. It remains powered down until a peripheral interrupt or external interrupt occurs.
  • Page 83 ST10 FAMILY PROGRAMMING MANUAL Relative Jump if Bit Set Syntax op1, op2 Operation IF (op1) = 1 THEN (IP) <-- (IP) + sign_extend (op2) ELSE Next Instruction END IF Data Types Description If the bit specified by op1 is set, program execution continues at the location of the instruction pointer, IP, plus the specified displacement, op2.
  • Page 84 ST10 FAMILY PROGRAMMING MANUAL Relative Jump if Bit Set & Clear Bit Syntax op1, op2 Operation IF (op1) = 1 THEN (op1) = 0 (IP) <-- (IP) + sign_extend (op2) ELSE Next Instruction END IF Data Types Description If the bit specified by op1 is set, program execution continues at the location of the instruction pointer, IP, plus the specified displacement, op2.
  • Page 85 ST10 FAMILY PROGRAMMING MANUAL JMPA Absolute Conditional Jump Syntax JMPA op1, op2 Operation IF (op1) = 1 THEN (IP) <-- op2 ELSE Next Instruction END IF Description If the condition specified by op1 is met, a branch to the absolute address specified by op2 is taken. If the condition is not met, no action is taken, and the instruction following the JMPA instruction is executed nor- mally.
  • Page 86 ST10 FAMILY PROGRAMMING MANUAL JMPI Indirect Conditional Jump Syntax JMPI op1, op2 Operation IF (op1) = 1 THEN (IP) <-- (op2) ELSE Next Instruction END IF Description If the condition specified by op1 is met, a branch to the absolute address specified by op2 is taken. If the condition is not met, no action is taken, and the instruction following the JMPI instruction is executed nor- mally.
  • Page 87 ST10 FAMILY PROGRAMMING MANUAL JMPR Relative Conditional Jump Syntax JMPR op1, op2 Operation IF (op1) = 1 THEN (IP) <-- (IP) + sign_extend (op2) ELSE Next Instruction END IF Description If the condition specified by op1 is met, program execution continues at the location of the instruction pointer, IP, plus the specified displacement, op2.
  • Page 88 ST10 FAMILY PROGRAMMING MANUAL JMPS Absolute Inter-Segment Jump Syntax JMPS op1, op2 Operation (CSP) <-- op1 (IP) <-- op2 Description Branches unconditionally to the absolute address specified by op2 within the segment specified by op1. Flags Not affected Not affected Not affected Not affected Not affected...
  • Page 89 ST10 FAMILY PROGRAMMING MANUAL Relative Jump if Bit Clear Syntax op1, op2 Operation IF (op1) = 0 THEN (IP) <-- (IP) + sign_extend (op2) ELSE Next Instruction END IF Data Types Description If the bit specified by op1 is clear, program execution continues at the location of the instruction pointer, IP, plus the specified displacement, op2.
  • Page 90 ST10 FAMILY PROGRAMMING MANUAL JNBS Relative Jump if Bit Clear & Set Bit Syntax JNBS op1, op2 Operation IF (op1) = 0 THEN (op1) = 1 (IP) <-- (IP) + sign_extend (op2) ELSE Next Instruction END IF Data Types Description If the bit specified by op1 is clear, program execution continues at the location of the instruction pointer, IP, plus the specified displacement, op2.
  • Page 91 ST10 FAMILY PROGRAMMING MANUAL Move Data Syntax op1, op2 Operation (op1) <-- (op2) Data Types WORD Description Moves the contents of the source operand specified by op2 to the location specified by the destination operand op1. The contents of the moved data is examined, and the flags are updated accordingly. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 92 ST10 FAMILY PROGRAMMING MANUAL MOVB Move Data Syntax MOVB op1, op2 Operation (op1) <-- (op2) Data Types BYTE Description Moves the contents of the source operand specified by op2 to the location specified by the destination operand op1. The contents of the moved data is examined, and the flags are updated accordingly. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 93 ST10 FAMILY PROGRAMMING MANUAL MOVBS Move Byte Sign Extend Syntax MOVBS op1, op2 Operation (low byte op1) <-- (op2) IF (op2 ) = 1 THEN (high byte op1) <-- FF ELSE (high byte op1) <-- 00 END IF Data Types WORD, BYTE Description Moves and sign extends the contents of the source byte specified by op2 to the word location specified by...
  • Page 94 ST10 FAMILY PROGRAMMING MANUAL MOVBZ Move Byte Zero Extend Syntax MOVBZ op1, op2 Operation (low byte op1) <-- (op2) (high byte op1) <-- 00 Data Types WORD, BYTE Description Moves and zero extends the contents of the source byte specified by op2 to the word location specified by the destination operand op1.
  • Page 95 ST10 FAMILY PROGRAMMING MANUAL Signed Multiplication Syntax op1, op2 Operation (MD) <-- (op1) * (op2) Data Types WORD Description Performs a 16-bit by 16-bit signed multiplication using the two words specified by operands op1 and op2 respectively. The signed 32-bit result is placed in the MD register. Flags Always cleared.
  • Page 96 ST10 FAMILY PROGRAMMING MANUAL MULU Unsigned Multiplication Syntax MULU op1, op2 Operation (MD) <-- (op1) * (op2) Data Types WORD Description Performs a 16-bit by 16-bit unsigned multiplication using the two words specified by operands op1 and op2 respectively. The unsigned 32-bit result is placed in the MD register. Flags Always cleared.
  • Page 97 ST10 FAMILY PROGRAMMING MANUAL Integer Two’s Complement Syntax Operation (op1) <-- 0 - (op1) Data Types WORD Description Performs a binary 2’s complement of the source operand specified by op1. The result is then stored in op1. Flags Set if the value of op1 represents the lowest possible negative number. Cleared otherwise. Used to signal the end of a table.
  • Page 98 ST10 FAMILY PROGRAMMING MANUAL NEGB Integer Two’s Complement Syntax NEGB Operation (op1) <-- 0 - (op1) Data Types BYTE Description Performs a binary 2’s complement of the source operand specified by op1. The result is then stored in op1. Flags Set if the value of op1 represents the lowest possible negative number.
  • Page 99 ST10 FAMILY PROGRAMMING MANUAL No Operation Syntax Operation No Operation Description This instruction causes a null operation to be performed. A null operation causes no change in the status of the flags. Flags Not affected Not affected Not affected Not affected Not affected Addressing Modes Mnemonic...
  • Page 100 ST10 FAMILY PROGRAMMING MANUAL Logical OR Syntax op1, op2 Operation (op1) <-- (op1) v (op2) Data Types WORD Description Performs a bitwise logical OR of the source operand specified by op2 and the destination operand spec- ified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 101 ST10 FAMILY PROGRAMMING MANUAL Logical OR Syntax op1, op2 Operation (op1) <-- (op1) v (op2) Data Types BYTE Description Performs a bitwise logical OR of the source operand specified by op2 and the destination operand spec- ified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 102 ST10 FAMILY PROGRAMMING MANUAL PCALL Push Word & Call Subroutine Absolute Syntax PCALL op1, op2 Operation (tmp) <-- (op1) (SP) <-- (SP) - 2 ((SP)) <-- (tmp) (SP) <-- (SP) - 2 ((SP)) <-- (IP) (IP) <-- op2 Data Types WORD Description Pushes the word specified by operand op1 and the value of the instruction pointer, IP, onto the system...
  • Page 103 ST10 FAMILY PROGRAMMING MANUAL Pop Word from System Stack Syntax Operation (tmp) <-- ((SP)) (SP) <-- (SP) + 2 (op1) <-- (tmp) Data Types WORD Description Pops one word from the system stack specified by the Stack Pointer into the operand specified by op1. The Stack Pointer is then incremented by two.
  • Page 104 ST10 FAMILY PROGRAMMING MANUAL PRIOR Prioritize Register Syntax PRIOR op1, op2 Operation (tmp) <-- (op2) (count) <-- 0 ) ≠ 1 AND (count) ≠ 15 AND (op2) ≠ 0 DO WHILE (tmp (tmp <-- (tmp (count) <-- (count) + 1 END WHILE (op1) <-- (count)
  • Page 105 ST10 FAMILY PROGRAMMING MANUAL PUSH Push Word on System Stack Syntax PUSH Operation (tmp) <-- (op1) (SP) <-- (SP) - 2 ((SP)) <-- (tmp) Data Types WORD Description Moves the word specified by operand op1 to the location in the internal system stack specified by the Stack Pointer, after the Stack Pointer has been decremented by two.
  • Page 106 ST10 FAMILY PROGRAMMING MANUAL PWRDN Enter Power Down Mode Syntax PWRDN Operation Enter Power Down Mode Description This instruction causes the part to enter the power down mode. In this mode, all peripherals and the CPU are powered down until the part is externally reset. To insure that this instruction is not accidentally exe- cuted, it is implemented as a protected instruction.
  • Page 107 ST10 FAMILY PROGRAMMING MANUAL Return from Subroutine Syntax Operation (IP) <-- ((SP)) (SP) <-- (SP) + 2 Description Returns from a subroutine. The IP is popped from the system stack. Execution resumes at the instruction following the CALL instruction in the calling routine. Flags Not affected Not affected...
  • Page 108 ST10 FAMILY PROGRAMMING MANUAL RETI Return from Interrupt Routine Syntax RETI Operation (IP) <-- ((SP)) (SP) <-- (SP) + 2 IF (SYSCON.SGTDIS=0) THEN (CSP) <-- ((SP)) (SP) <-- (SP) + 2 END IF (PSW) <-- ((SP)) (SP) <-- (SP) + 2 Description Returns from an interrupt routine.
  • Page 109 ST10 FAMILY PROGRAMMING MANUAL RETP Return from Subroutine & Pop Word Syntax RETP Operation (IP) <-- ((SP)) (SP) <-- (SP) + 2 (tmp) <-- ((SP)) (SP) <-- (SP) + 2 (op1) <-- (tmp) Data Types WORD Description Returns from a subroutine. The IP is first popped from the system stack and then the next word is popped from the system stack into the operand specified by op1.
  • Page 110 ST10 FAMILY PROGRAMMING MANUAL RETS Return from Inter-Segment Subroutine Syntax RETS Operation (IP) <-- ((SP)) (SP) <-- (SP) + 2 (CSP) <-- ((SP)) (SP) <-- (SP) + 2 Description Returns from an inter-segment subroutine. The IP and CSP are popped from the system stack. Execution resumes at the instruction following the CALLS instruction in the calling routine.
  • Page 111 ST10 FAMILY PROGRAMMING MANUAL Rotate Left Syntax op1, op2 Operation (count) <-- (op2) <-- 0 DO WHILE (count) ≠ 0 <-- (op1 (op1 <-- (op1 [n=1...15] (op1 <-- (C) (count) <-- (count) - 1 END WHILE Data Types WORD Description Rotates the destination word operand op1 left by as many times as specified by the source operand op2.
  • Page 112 ST10 FAMILY PROGRAMMING MANUAL Rotate Right Syntax ROR op1, op2 Operation (count) <-- (op2) <-- 0 <-- 0 DO WHILE (count) ≠ 0 <-- (V) v (C) <-- (op1 (op1 <-- (op1 [n=0...14] (op1 <-- (C) (count) <-- (count) - 1 END WHILE Data Types WORD...
  • Page 113 ST10 FAMILY PROGRAMMING MANUAL SCXT Switch Context Syntax SCXT op1, op2 Operation (tmp1) <-- (op1) (tmp2) <--(op2) (SP) <-- (SP) - 2 ((SP)) <-- (tmp1) (op1) <-- (tmp2) Data Types WORD Description Used to switch contexts for any register. Switching context is a push and load operation. The contents of the register specified by the first operand, op1, are pushed onto the stack.
  • Page 114 ST10 FAMILY PROGRAMMING MANUAL Shift Left Syntax op1, op2 Operation (count) <-- (op2) <-- 0 DO WHILE (count) ≠ 0 <-- (op1 (op1 <-- (op1 [n=1...15] (op1 <-- 0 (count) <-- (count) - 1 END WHILE Data Types WORD Description Shifts the destination word operand op1 left by as many times as specified by the source operand op2.
  • Page 115 ST10 FAMILY PROGRAMMING MANUAL Shift Right Syntax op1, op2 Operation (count) <-- (op2) <-- 0 <-- 0 DO WHILE (count) ≠ 0 <-- (C) v (V) <-- (op1 (op1 <-- (op1 [n=0...14] (op1 <-- 0 (count) <-- (count) - 1 END WHILE Data Types WORD...
  • Page 116 ST10 FAMILY PROGRAMMING MANUAL SRST Software Reset Syntax SRST Operation Software Reset Description This instruction is used to perform a software reset. A software reset has the same effect on the micro- controller as an externally applied hardware reset. To insure that this instruction is not accidentally exe- cuted, it is implemented as a protected instruction.
  • Page 117 ST10 FAMILY PROGRAMMING MANUAL SRVWDT Service Watchdog Timer Syntax SRVWDT Operation Service Watchdog Timer Description This instruction services the Watchdog Timer. It reloads the high order byte of the Watchdog Timer with a preset value and clears the low byte on every occurrence. Once this instruction has been executed, the watchdog timer cannot be disabled.
  • Page 118 ST10 FAMILY PROGRAMMING MANUAL Integer Subtraction Syntax op1, op2 Operation (op1) <-- (op1) - (op2) Data Types WORD Description Performs a 2’s complement binary subtraction of the source operand specified by op2 from the destina- tion operand specified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 119 ST10 FAMILY PROGRAMMING MANUAL SUBB Integer Subtraction Syntax SUBB op1, op2 Operation (op1) <-- (op1) - (op2) Data Types BYTE Description Performs a 2’s complement binary subtraction of the source operand specified by op2 from the destina- tion operand specified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 120 ST10 FAMILY PROGRAMMING MANUAL SUBC Integer Subtraction with Carry Syntax SUBC op1, op2 Operation (op1) <-- (op1) - (op2) - (C) Data Types WORD Description Performs a 2’s complement binary subtraction of the source operand specified by op2 and the previously generated carry bit from the destination operand specified by op1.
  • Page 121 ST10 FAMILY PROGRAMMING MANUAL SUBCB Integer Subtraction with Carry Syntax SUBCB op1, op2 Operation (op1) <-- (op1) - (op2) - (C) Data Types BYTE Description Performs a 2’s complement binary subtraction of the source operand specified by op2 and the previously generated carry bit from the destination operand specified by op1.
  • Page 122 ST10 FAMILY PROGRAMMING MANUAL TRAP Software Trap Syntax TRAP Operation (SP) <-- (SP) - 2 ((SP)) <-- (PSW) IF (SYSCON.SGTDIS=0) THEN (SP) <-- (SP) - 2 ((SP)) <-- (CSP) (CSP) <-- 0 END IF (SP) <-- (SP) - 2 ((SP)) <-- (IP) (IP) <-- zero_extend (op1*4)
  • Page 123 ST10 FAMILY PROGRAMMING MANUAL Logical Exclusive OR Syntax op1, op2 <-- (op1) ⊕ (op2) Operation (op1) Data Types WORD Description Performs a bitwise logical EXCLUSIVE OR of the source operand specified by op2 and the destination operand specified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.
  • Page 124 ST10 FAMILY PROGRAMMING MANUAL XORB Logical Exclusive OR Syntax XORB op1.0p2 <-- (op1) ⊕ (op2) Operation (op1) Data Types BYTE Description Performs a bitwise logical EXCLUSIVE OR of the source operand specified by op2 and the destination operand specified by op1. The result is then stored in op1. Flags Set if the value of op2 represents the lowest possible negative number.

  • Page 125: Mac Instruction Set

    ST10 FAMILY PROGRAMMING MANUAL 3 - MAC INSTRUCTION SET This section describes the instruction set for the nations of pointer post-modification for each of MAC. Refer to device datasheets for information these 2 new addressing modes (see Table 27). about which ST10 devices include the MAC. When using pointer post-modification addressing modes, the address pointed to (i.e the value in the 3.1 - Addressing modes...

  • Page 126: Mac Instruction Execution Time

    ST10 FAMILY PROGRAMMING MANUAL 3.2 - MAC Instruction Execution Time execution time for MAC instructions, refer to Instruction execution times in Table 6, considering instruction execution time MAC instructions to be 4-byte instructions with a instructions is calculated in the same way as that of the standard instruction set.
  • Page 127 ST10 FAMILY PROGRAMMING MANUAL The following table gives the MAC Function Code co-processor as its operation code. Unused func- of each instruction. This Function Code is the third tion codes are treated as CoNOP Function Code byte of the new instruction and is used by the by the MAC.

  • Page 128: Mac Instruction Conventions

    ST10 FAMILY PROGRAMMING MANUAL 3.4 - MAC instruction conventions This section details the conventions used to describe the MAC instruction set. 3.4.1 - Operands Operand Description Specifies the immediate constant value of opX (opX) Specifies the contents of opX (opX Specifies the contents of bit n of opX ((opX)) Specifies the contents of opX (i.e.

  • Page 129: Instruction Format

    ST10 FAMILY PROGRAMMING MANUAL 3.4.5 - Instruction format Table 31 : IDX Addressing Mode Encoding and GPR offset Encoding (continued) The instruction format is the same as that of the standard instruction set. Addressing Mode 4-bit Encoding In addition, the following new symbols are used: + QR1 - QR1 Instruction...
  • Page 130 ST10 FAMILY PROGRAMMING MANUAL CoABS Absolute Value Group 40-bit Arithmetic Instructions Syntax CoABS Operation (ACC) <-- Abs( ACC ) Syntax CoABS op1, op2 Operation (ACC) <-- Abs( (op2)\(op1) ) Data Types ACCUMULATOR, DOUBLE WORD Result 40-bit signed value Description Compute the absolute value of the Accumulator if no operands are specified or the absolute value of a 40-bit source operand and load the result in the Accumulator.
  • Page 131 ST10 FAMILY PROGRAMMING MANUAL CoADD(2) Group 40-bit Arithmetic Instructions Syntax CoADD op1, op2 Operation (tmp) <-- (op2)\(op1) (ACC) <-- (ACC) + (tmp) Syntax CoADD2 op1, op2 Operation (tmp) <-- 2 * (op2)\(op1) (ACC) <-- (ACC) + (tmp) Data Types DOUBLE WORD Result 40-bit signed value Description...
  • Page 132 ST10 FAMILY PROGRAMMING MANUAL Examples CoADD R0, R1 ; (ACC) <-- (ACC) + (R1)\(R0) CoADD2 R2, [R6+] ; (ACC) <-- (ACC) + 2*( ((R6))\(R2) ) ; (R6) <-- (R6) + 2 Repeat 3 times CoADD CoADD [IDX1+QX1], [R10+QR0] ; (ACC) <-- (ACC) + ( ((R10))\((IDX1)) ) ;...
  • Page 133 ST10 FAMILY PROGRAMMING MANUAL CoASHR Accumulator Arithmetic Shift Right with Optional Round Group Shift Instructions Syntax CoASHRop1 CoASHR op1, rnd Operation (count) <-- (op1) <-- 0 DO WHILE (count) ≠ 0 (ACC <-- (ACC [n=0-38] (count) <-- (count) -1 END WHILE IF (rnd) THEN (ACC) <-- (ACC) + 00008000...
  • Page 134 ST10 FAMILY PROGRAMMING MANUAL CoCMP Compare Group Compare Instructions Syntax CoCMP op1, op2 Operation <-- (op2)\(op1) (ACC) <--> (tmp) Data Types DOUBLE WORD Description Subtracts a 40-bit signed operand from the 40-bit Accumulator content and update the N, Z and C flags contained in the MSW register leaving the accumulator unchanged.
  • Page 135 ST10 FAMILY PROGRAMMING MANUAL CoLOAD(2)(-) Load Accumulator Group 40-bit Arithmetic Instructions Syntax CoLOAD op1, op2 Operation (tmp) <-- (op2)\(op1) (ACC) <-- 0 + (tmp) Syntax CoLOAD- op1, op2 Operation (tmp) <-- (op2)\(op1) (ACC) <-- 0 - (tmp) Syntax CoLOAD2 op1, op2 Operation (tmp) <-- 2 * (op2)\(op1)
  • Page 136 ST10 FAMILY PROGRAMMING MANUAL CoMAC(R/-) Multiply-Accumulate & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMAC op1, op2 Operation IF (MP = 1) THEN (tmp) <-- ((op1) * (op2)) << 1 (ACC) <-- (ACC) + (tmp) ELSE (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) END IF Syntax...
  • Page 137 ST10 FAMILY PROGRAMMING MANUAL MAC Flags Set if the most significant bit of the result is set. Cleared otherwise. Set if the result equals zero. Cleared otherwise. Set if a carry or borrow is generated. Cleared otherwise. Set if an arithmetic overflow occurred. Not affected otherwise. Set if the MAE is used.
  • Page 138 ST10 FAMILY PROGRAMMING MANUAL CoMAC(R)u(-) Unsigned Multiply-Accumulate & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACu op1, op2 Operation (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) Syntax CoMACu op1, op2, rnd Operation (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) + 00 0000 8000 (MAL) <-- 0 Syntax CoMACu-...
  • Page 139 ST10 FAMILY PROGRAMMING MANUAL Addressing Modes Mnemonic Format Bytes CoMACu , Rw A3 nm 10 00 CoMACu- , Rw A3 nm 20 00 CoMACu , Rw , rnd A3 nm 11 00 CoMACRu , Rw A3 nm 30 00 CoMACRu , Rw , rnd A3 nm 31 00...
  • Page 140 ST10 FAMILY PROGRAMMING MANUAL CoMAC(R)us(-) Mixed Multiply-Accumulate & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACus op1, op2 Operation (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) Syntax CoMACus op1, op2, rnd Operation (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) + 00 0000 8000 (MAL) <-- 0 Syntax CoMACus- op1, op2...
  • Page 141 ST10 FAMILY PROGRAMMING MANUAL Addressing Modes Mnemonic Format Bytes CoMACus , Rw A3 nm 90 00 CoMACus- , Rw A3 nm A0 00 CoMACus , Rw , rnd A3 nm 91 00 CoMACRus , Rw A3 nm B0 00 CoMACRus , Rw , rnd A3 nm B1 00...
  • Page 142 ST10 FAMILY PROGRAMMING MANUAL CoMAC(R)su(-) Mixed Multiply-Accumulate & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACsu op1, op2 Operation (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) Syntax CoMACsu op1, op2, rnd Operation (tmp) <-- (op1) * (op2) (ACC) <-- (ACC) + (tmp) + 00 0000 8000 (MAL) <-- 0...
  • Page 143 ST10 FAMILY PROGRAMMING MANUAL Addressing Modes Mnemonic Format Bytes CoMACsu , Rw A3 nm 50 00 CoMACsu- , Rw A3 nm 60 00 CoMACsu , Rw , rnd A3 nm 51 00 CoMACRsu , Rw A3 nm 70 00 CoMACRsu , Rw , rnd A3 nm 71 00...
  • Page 144 ST10 FAMILY PROGRAMMING MANUAL CoMACM(R/-) Multiply-Accumulate Parallel Data Move & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACM op1, op2 Operation IF (MP = 1) THEN (tmp) <-- ((op1))*((op2)) << 1 (ACC) <-- (ACC) + (tmp) ELSE (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) END IF ((IDX...
  • Page 145 ST10 FAMILY PROGRAMMING MANUAL Description Multiplies the two signed 16-bit source operands “op1” and “op2”. The obtained signed 32-bit product is first sign-extended, then and on condition the MP flag is set, it is one-bit left shifted, and next, it is option- ally negated prior being added/subtracted to/from the 40-bit ACC register content, finally the obtained result is optionally rounded before being stored in the 40-bit ACC register.
  • Page 146 ST10 FAMILY PROGRAMMING MANUAL Examples CoMACM [IDX1+QX0],[R10+QR1], rnd ; (ACC) <-- (ACC) + ((IDX1))*((R10)) + rnd ; (R10) <-- (R10) + (QR1) ; ( ((IDX1)-(QX0)) ) <-- ((IDX1)) ; (IDX1) <-- (IDX1) + (QX0) Repeat 3 times CoMACM CoMACM [IDX0 - QX0], [R8+QR0] ;...
  • Page 147 ST10 FAMILY PROGRAMMING MANUAL CoMACM(R)u(-) Unsigned Multiply-Accumulate Parallel Data Move & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACMu op1, op2 Operation (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) ((IDX (-⊗))) <-- ((IDX Syntax CoMACMu op1, op2, rnd Operation (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) + 00 0000 8000...
  • Page 148 ST10 FAMILY PROGRAMMING MANUAL MAC Flags Set if the most significant bit of the result is set. Cleared otherwise. Set if the result equals zero. Cleared otherwise. Set if a carry or borrow is generated. Cleared otherwise. Set if an arithmetic overflow occurred. Not affected otherwise. Set if the MAE is used.
  • Page 149 ST10 FAMILY PROGRAMMING MANUAL CoMACM(R)us(-) Mixed Multiply-Accumulate Parallel Data Move & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACMus op1, op2 Operation (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) ((IDX (-⊗))) <-- ((IDX Syntax CoMACMus op1, op2, rnd Operation (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) + 00 0000 8000...
  • Page 150 ST10 FAMILY PROGRAMMING MANUAL MAC Flags Set if the most significant bit of the result is set. Cleared otherwise. Set if the result equals zero. Cleared otherwise. Set if a carry or borrow is generated. Cleared otherwise. Set if an arithmetic overflow occurred. Not affected otherwise. Set if the MAE is used.
  • Page 151 ST10 FAMILY PROGRAMMING MANUAL CoMACM(R)su(-) Mix. Multiply-Accumulate Parallel Data Move & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMACMsu op1, op2 Operation (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) ((IDX (-⊗))) <-- ((IDX Syntax CoMACMsu op1, op2, rnd Operation (tmp) <-- ((op1))*((op2)) (ACC) <-- (ACC) + (tmp) + 00 0000 8000...
  • Page 152 ST10 FAMILY PROGRAMMING MANUAL MAC Flags Set if the m.s.b. of the result is set. Cleared otherwise. Set if the result equals zero. Cleared otherwise. Set if a carry or borrow is generated. Cleared otherwise. Set if an arithmetic overflow occurred. Not affected otherwise. Set if the MAE is used.
  • Page 153 ST10 FAMILY PROGRAMMING MANUAL CoMAX Maximum Group Compare Instructions Syntax CoMAXop1, op2 Operation (tmp) <-- (op2)\(op1) (ACC) <-- max( (ACC), (tmp) ) Data Types DOUBLE WORD Result 40-bit signed value Description Compares a signed 40-bit operand against the ACC register content. The 40-bit operand results from the concatenation of the two source operands op1 (LSW) and op2 (MSW) which is then sign-extended.
  • Page 154 ST10 FAMILY PROGRAMMING MANUAL CoMIN Minimum Group Compare Instructions Syntax CoMIN op1, op2 Operation (tmp) <-- (op2)\(op1) (ACC) <-- min( (ACC), (tmp) ) Data Types DOUBLE WORD Result 40-bit signed value Description Compares a signed 40-bit operand against the ACC register content. The 40-bit operand results from the concatenation of the two source operands op1 (LSW) and op2 (MSW) which is then sign-extended.
  • Page 155 ST10 FAMILY PROGRAMMING MANUAL CoMOV Memory to Memory Move Group Transfer Instructions Syntax CoMOV op1, op2 Operation (op1) <-- (op2) Data Types WORD Description Moves the contents of the memory location specified by the source operand, op2, to the memory location specified by the destination operand op1.
  • Page 156 ST10 FAMILY PROGRAMMING MANUAL CoMUL(-) Signed Multiply & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMUL op1, op2 Operation IF (MP = 1) THEN (ACC) <-- ((op1) * (op2)) << 1 ELSE (ACC) <-- (op1) * (op2) END IF Syntax CoMUL- op1, op2 Operation IF (MP = 1) THEN...
  • Page 157 ST10 FAMILY PROGRAMMING MANUAL Addressing Modes Mnemonic Format Bytes CoMUL , Rw A3 nm C0 00 CoMUL- , Rw A3 nm C8 00 CoMUL , Rw , rnd A3 nm C1 00 ⊗], [Rw ⊗] CoMUL [IDX 93 Xm C0 0:0qqq ⊗], [Rw ⊗] CoMUL-...
  • Page 158 ST10 FAMILY PROGRAMMING MANUAL CoMULu(-) Unsigned Multiply & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMULu op1, op2 Operation (ACC) <-- (op1) * (op2) Syntax CoMULu- op1, op2 Operation (ACC) <-- - ((op1) * (op2)) Syntax CoMULu op1, op2, rnd Operation (ACC) <-- (op1) * (op2) + 00 0000 8000 (MAL)
  • Page 159 ST10 FAMILY PROGRAMMING MANUAL Notes: The result of CoMULu is never saturated, whatever the value of MS bit is. (see multiplication examples below). Examples CoMULu R0, R1, rnd ; (ACC) <-- (R0)*(R1) + rnd CoMULu- R2, [R6+] ; (ACC) <-- -(R2)*((R6)) ;...
  • Page 160 ST10 FAMILY PROGRAMMING MANUAL CoMULus(-) Mixed Multiply & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMULus op1, op2 Operation (ACC) <-- (op1) * (op2) Syntax CoMULus- op1, op2 Operation (ACC) <-- - ((op1) * (op2)) Syntax CoMULus op1, op2, rnd Operation (ACC) <-- (op1) * (op2) + 00 0000 8000 (MAL)
  • Page 161 ST10 FAMILY PROGRAMMING MANUAL Examples CoMULus R0, R1, rnd ; (ACC) <-- (R0)*(R1) + rnd CoMULus- R2, [R6+] ; (ACC) <-- -(R2)*((R6)) ; (R6) <-- (R6) + 2 CoMULus [IDX1+QX0], [R11+QR0] ; (ACC) <-- ((IDX1))*((R11)) ; (R11) <-- (R11) + (QR0) ;...
  • Page 162 ST10 FAMILY PROGRAMMING MANUAL CoMULsu(-) Mixed Multiply & Optional Round Group Multiply/Multiply-Accumulate Instructions Syntax CoMULsu op1, op2 Operation (ACC) <-- (op1) * (op2) Syntax CoMULsu- op1, op2 Operation (ACC) <-- - ((op1) * (op2)) Syntax CoMULsu op1, op2, rnd Operation (ACC) <-- (op1) * (op2) + 00 0000 8000 (MAL)
  • Page 163 ST10 FAMILY PROGRAMMING MANUAL Examples CoMULsu R0, R1, rnd ; (ACC) <-- (R0)*(R1) + rnd CoMULsu- R2, [R6+] ; (ACC) <-- -(R2)*((R6)) ; (R6) <-- (R6) + 2 CoMULsu [IDX0], [R11+] ; (ACC) <-- ((IDX0))*((R11)) ; (R11) <-- (R11) + 2 CoMULsu- [IDX1-], [R15] ;...
  • Page 164 ST10 FAMILY PROGRAMMING MANUAL CoNEG Negate Accumulator with Optional Rounding Group 32-bit Arithmetic Instructions Syntax CoNEG CoNEG nd Operation IF (rnd) THEN (ACC) <-- 0 - (ACC) + 00 0000 8000 (MAL) <-- 0 ELSE (ACC) <-- 0 - (ACC) END IF Data Types ACCUMULATOR...
  • Page 165 ST10 FAMILY PROGRAMMING MANUAL CoNOP No-Operation Group 40-bit Arithmetic Instructions Syntax CoNOP Operation No Operation Description Modifies the address pointers without changing the internal MAC-Unit registers. MAC Flags Not affected Not affected Not affected Not affected Not affected Not affected Addressing Modes Mnemonic Format...
  • Page 166 ST10 FAMILY PROGRAMMING MANUAL CoRND Round Accumulator Group Shift Instructions Syntax CoRND Operation (ACC) <-- (ACC) + 00 0000 8000 (MAL) <-- 0 Data Types ACCUMULATOR Result 40-bit signed value Description Rounds the ACC register contents by adding 0000 8000h to it and store the result in the ACC register and the lower part of the ACC register, MAL, is cleared.
  • Page 167 ST10 FAMILY PROGRAMMING MANUAL CoSHL Accumulator Logical Shift Left Group Shift Instructions Syntax CoSHL Operation (count) <-- (op1) <-- 0 DO WHILE (count) ≠ 0 <-- (ACC (ACC <-- (ACC [n=1...39] (ACC <-- 0 (count) <-- (count) -1 END WHILE Data types ACCUMULATOR Result...
  • Page 168 ST10 FAMILY PROGRAMMING MANUAL CoSHR Accumulator Logical Shift Right Group Shift Instructions Syntax CoSHR Operation (count) <-- (op1) <-- 0 DO WHILE (count) ≠ 0 ((ACC <-- (ACC [n=0-38] (ACC <-- 0 (count) <-- (count) -1 END WHILE Data Types ACCUMULATOR Result 40-bit signed value...
  • Page 169 ST10 FAMILY PROGRAMMING MANUAL CoSTORE Store a MAC-Unit Register Group Transfer Instructions Syntax CoSTORE op1, op2 Operation (op1) <-- (op2) Data Types WORD Description Moves the contents of a MAC-Unit register specified by the source operand op2 to the location specified by the destination operand op1.
  • Page 170 ST10 FAMILY PROGRAMMING MANUAL CoSUB(2)(R) Subtract Group Arithmetic Instructions Syntax CoSUB op1, op2 Operation (tmp) <-- (op2)\(op1) (ACC) <-- (ACC) - (tmp) Syntax CoSUB2 op1, op2 Operation (tmp) <-- 2 * (op2)\(op1) (ACC) <-- (ACC) - (tmp) Syntax CoSUBR op1, op2 Operation (tmp) <-- (op2)\(op1)
  • Page 171 ST10 FAMILY PROGRAMMING MANUAL Addressing Modes Mnemonic Format Bytes CoSUB , Rw A3 nm 0A 00 CoSUBR , Rw A3 nm 12 00 CoSUB2 , Rw A3 nm 4A 00 CoSUB2R , Rw A3 nm 52 00 ⊗], [Rw ⊗] CoSUB [IDX 93 Xm 0A rrrr:rqqq...
  • Page 172 ST10 FAMILY PROGRAMMING MANUAL 4 - REVISION HISTORY Revision 5 - version 4 Updated Disclaimer Revision 4 - version 1 of January 2000 Chapter 2.1.4 See 1: GPRAddress = (CP + 2 x ShortAddress) See 3: LongAddress = (GPRAddress) + Constant) See 4: PhysicalAddress = (DPPi) + LongAddress ^ 3FFFh See5: (GPRPAddress) = (GPRDAddress) + ∆...
  • Page 173 ST10 FAMILY PROGRAMMING MANUAL Revision 4 - revision 3 Instructions: CoMULsu(-), CoMULus(-), Addressing modes corrected. CoMAC(r)su(-), CoMAC(r)us(-), CoMACM(r)su(-), Function code in Table 30 corrected. CoMAC(r)us(-), CoNOP, CoSHL, CoSHR, CoASHR, CoSTORE Instructions JBC and JNBS: Condition flags corrected. Table 22: Instruction set ordered by Hex code : Updated to include section C0-FF, MAC instructions and working register indexes.
  • Page 174 Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice.

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