Register Descriptions - STMicroelectronics SPC572L series Reference Manual

Software Watchdog Timer (SWT)
SLK bits in the SWT_CR are set, then the SWT_CR, SWT_TO, SWT_WN, and SWT_SK
registers are read-only.
The SWT memory map is shown in
are device specific. These values are determined by SWT inputs.
Offset
0x0000 SWT Control Register (SWT_CR)
0x0004 SWT Interrupt Register (SWT_IR)
0x0008 SWT Time-out Register (SWT_TO)
0x000C SWT Window Register (SWT_WN)
0x0010 SWT Service Register (SWT_SR)
0x0014 SWT Counter Output Register (SWT_CO)
0x0018 SWT Service Key Register (SWT_SK)
0x001C-0x3FFF
1. The reset value for this register is device specific. See the device configuration chapter.
40.3.1

Register descriptions

The following sections detail the individual registers within the SWT programming model.
Note: See the memory map for the base address of SWT registers.
40.3.1.1 SWT Control Register (SWT_CR)
The SWT_CR contains fields for configuring and controlling the SWT. This register is read-
only if either the SWT_CR[HLK] or SWT_CR[SLK] bits are set.
Offset 0x0000
0 1
R
W
1
Reset * *
16 17
R 0 0
W
1
Reset * *
1
The reset value for the SWT_CR is device specific. See the device configuration section.
852/2058
Table 440. SWT memory map
Register
2 3 4 5
* * * *
18 19 20 21
0 0 0
SMD
* * * *
Figure 384. SWT Control Register (SWT_CR)
DocID027809 Rev 4
Table 440. The reset values of SWT_CR and SWT_TO
Access
Reserved
6 7 8 9
0 0
* * * *
22 23 24 25
RIA WND ITR
* * * *
Reset Value
(1)
R/W —
R/W 0x0000_0000
1
R/W —
R/W 0x0000_0000
W 0x0000_0000
R 0x0000_0000
R/W 0x0000_0000
Access: Read/Write
10 11 12 13
0 0 0 0
* * * *
26 27 28 29
0
HLK SLK STP
* * * *
RM0400
Location
on page 852
on page 854
on page 854
on page 855
on page 855
on page 856
on page 856
14 15
0 0
* *
30 31
FRZ WEN
* *