Table 804. Dma_Smsg_Bit3 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Address Offset = 0x0050
0
R
W
Reset 0
8
R
W
Reset 0
16
R
W
Reset 0
24
R ID[5:4] / ID[1:0]
W
Reset 0
Figure 792. DMA Slow Serial Message Bit3 Read Register (DMA_SMSG_BIT3)
Field
0:3
Channel Number. Indicates the channel number of the received message being read by DMA. Valid
values are 0 to '15'
CHNUM
Serial Message Type. Indicates the type of Serial Message received
4
TYPE 0 – Short Serial Message
1 – Enhanced Serial Message
5:19 Reserved. Read returns zeros
20 Placed as 0 by Specification
Configuration bit 'C'. Indicates the type of Enhanced Serial message
21
CFG 0 – Enhanced Serial Message with 8-bit ID field
1 – Enhanced Serial Message with 4-bit ID field
22:25
ID Field. Value depends on setting of 'C' bit. If 'C' bit is 0, this field is ID[7:4] and if the 'C' bit is 1, this
ID[7:4]/ID[3:0
field is ID[3:0]
]
26 0 as per SAE Specification
1 2
CHNUM
0 0
9 10
0 0
17 18
0 0
25 26
0
0 0

Table 804. DMA_SMSG_BIT3 Field Descriptions

DocID027809 Rev 4
3 4
TYPE
0 0
11 12
0 0
19 20
0
0 0
27 28
ID[3:0] / DATA[15:12]
0 0
Description
SENT Receiver (SRX)
5 6
0 0
13 14
0 0
21 22
CFG ID[7:6] / ID[3:2]
0 0
29 30
0 0
Access: R
7
0
15
0
23
0
31
0
0
1385/2058
1410