Table 379. Wtimr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

Successive Approximation Register Analog-to-Digital Converter (SARADC) Digital Interface
Offset 0x034
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Figure 336. Watchdog Threshold Interrupt Mask Register (WTIMR)
Field
2x+1
MSKWDGxH
[x = 0–15]
Bit 2x
MSKWDGxL
[x = 0–15]
Note: If num_watchdog generic parameter is zero, this register is not implemented.
36.5.1.9 DMA Enable Register (DMAE)
The DMA Enable (DMAE) register sets up the DMA for use with the SARADC.
778/2058
2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0

Table 379. WTIMR field descriptions

This corresponds to the mask bit for the interrupt generated on the converted value
being higher than the programmed higher threshold.
0 Interrupt for WDGxH is disabled.
1 Interrupt for WDGxH is enabled.
This corresponds to the mask bit for the interrupt generated on the converted value
being lower than the programmed lower threshold.
0 Interrupt for WDGxL is disabled.
1 Interrupt for WDGxL is enabled.
DocID027809 Rev 4
6 7 8 9
0 0 0 0
22 23 24 25
0 0 0 0
Description
Access: User Read/Write
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
14 15
0 0
30 31
0 0