Table 472. Gtmdi_Dpll_Wpc1 Field Descriptions - STMicroelectronics SPC572L series Reference Manual

GTM Development Interface (GTMDI)
Register index: 41
31 30
R 0 0
W
RESET: 0 0
15 14
R 0 0
W
RESET: 0 0
Figure 419. DPLL watchpoint control 1 register (GTMDI_DPLL_WPC1)
Table 472
Field
Watchpoint Selection 1. The TSEL1[1:0] field selects if a watchpoint trigger is issued based on
TASI or SASI events.
25–24
00 Watchpoint on TASI event
TSEL1 01 Watchpoint on SASI event
10 Reserved
11 Reserved
Watchpoint Message Control 1. The WMC1 Watchpoint Message Control 1 controls the watchpoint
message sent through the Message Data bus. If this bit is set it enables valid transitions on DPLL
22 SASI or TASI to generate a watchpoint message. This bit is written by the JTAG interface but can
also be controlled at SoC level with dedicated Start/Stop signals inputs to GTMDI.
WMC1
0 Watchpoint Messages disabled
1 Watchpoint Messages enabled
TASI/SASI Slope Selection. The TSS1 field selects the slope for TASI or SASI depending on
TSEL1 selection. The selected slope is monitored by watchpoints.
21–20
00 Any transition (both)
TSS1 01 Transition from 0 to 1 (positive slope)
10 Transition from 1 to zero (negative slope)
11 Reserved
The HEN1 Halt Enable 1 bit controls if the DPLL SASI or TASI selected signal is enabled to HALT
the GTM module. If this bit is set and an event occurs on the DPLL selected signal, a Halt signal is
17
generated to the GTM which enters Halt state.
HEN1
0 Disables Halt GTM
1 Enables Halt GTM
Watchpoint Selection 2B. The TSEL2B field selects the RAM access type to mach on
00 Watchpoint is issued on any access (read or write)
13–12
01 Watchpoint is issued based on write accesses
TSEL2B
10 Watchpoint is issued based on read accesses
11 Reserved
906/2058
29 28 27 26
0 0 0 0
0 0 0 0
13 12 11 10
0 0
TSEL2B
0 0 0 0
describes the GTMDI_DPLL_WPC1 register functions.

Table 472. GTMDI_DPLL_WPC1 field descriptions

DocID027809 Rev 4
25 24 23 22
0
WM
TSEL1
C1
0 0 0 0
9 8 7 6
0
WM
TSEL2A
C2
0 0 0 0
Description
21 20 19 18
0 0
TSS1
0 0 0 0
5 4 3 2
0 0 0 0
0 0 0 0
RM0400
17 16
0
HEN1
0 0
1 0
0
HEN2
0 0