Table 655. Register Conventions - STMicroelectronics SPC572L series Reference Manual

RM0400 LVDS Fast Asynchronous Serial Transmission (LFAST) – Interprocessor Communica-
Offset from
LFAST_BASE
(hex)
00C8 LFAST Unsolicited Rx Data Register 1 (UNSRDR1)
00CC LFAST Unsolicited Rx Data Register 0 (UNSRDR0)
The conventions in
individual register diagrams.
Always
reads 1
Table 655
Convention
Depending on its placement in the read or write row, indicates that the bit is not readable or not
writable.
FIELDNAME Identifies the field. Its presence in the read or write row indicates that it can be read or written.
R Read only. Writing this bit has no effect.
W Write only.
R/W Standard read/write bit. Only software can change the bits value (other than a hardware reset).
w1c Write one to clear. A status bit that can be read, and is cleared by writing a one.
Self-clearing Writing a one has some effect on the module, but its cleared by the H/W once the operation defined
bit by the bit is over
0 Resets to zero.
1 Resets to one.
[signal_name] Reset value is determined by polarity of indicated signal.
Table 654. LFAST memory map(Continued)
Register
Figure 640 and
1 0
Always R/W
reads 0 bit
Figure 640. Key to Register Fields
provides a key for register figures and tables and the register summary.

Table 655. Register conventions

Register Field Types
DocID027809 Rev 4
Table 655 serve as a key for the register summary and
BIT
Read- Write-
BIT
only bit only bit
Description
Reset Values
Reset Value
Access
(hex)
_
R 0000 0000
_
R 0000 0000
BIT
Write 1
to clear
BIT w1c
Location
on page 1254
on page 1254
0
Self-clear
bit
BIT
1227/2058
1292