Functional Description - STMicroelectronics SPC572L series Reference Manual

Error Reporting Module (ERM)
Field
0-7
SYNDROME
32.3

Functional description

32.3.1 Single-bit correction events
Single-bit correction events reported from Memory n are recorded in the Error Reporting
Module Status Register (ERM_SR[SBCn]). The corresponding access address which
initiated the ECC event is stored in the Memory n Error Address Register (ERM_EARn).
The corresponding ECC syndrome is stored in the Memory n Error Syndrome Register
(ERM_SYNn), which identifies the bit position of the corrected data on single-bit data
inversion. The ERM can be optionally configured to generate an interrupt notification upon
reporting of a single-bit ECC correction on Memory n by enabling ERM_ECR[SBCIEn].
Writing a '1' to ERM_SR[SBCn] clears this field anddeasserts the interrupt notification if
interrupt noficication is enabled for this memory channel.
The ERM only holds event information for the last reported event.
32.3.2 Non-correctable error events
Non-correctable ECC error events reported from Memory n are recorded in the Error
Reporting Module Status Register (ERM_SR[NCEn]). The corresponding access address
which initiated the ECC event is stored in the Memory n Error Address Register
(ERM_EARn). The corresponding ECC syndrome is stored in the Memory n Error
Syndrome Register (ERM_SYNn). In the event of a non-correcable address bit inversion,
the ERM_SYNn register identifies the identified address bit position. In the event of a non-
correctable, multi-bit data inversion, the syndrome value does not provide any additional
diagnostic information.
The ERM only holds event information for the last reported event.
682/2058
Table 332. ERM_SYNn field descritption
Memory n Syndrome - This field contains the ECC syndrome associated with the last
recorded ECC event on Memory n.
Note: Refer to the device configuration chapter for details on Memory n mapping.
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Description
RM0400