Start And Stop Of Dspi Transfers - STMicroelectronics SPC572L series Reference Manual

Deserial Serial Peripheral Interface (DSPI)
Generally, more than one slave device can be connected to the DSPI master.
Eight Peripheral Chip Select (PCS) signals of the DSPI masters can be used to select which
of the slaves to communicate with. Refer to the chip configuration chapter for the number of
PCS signals used in this MCU.
The three DSPI configurations share transfer protocol and timing properties which are
described independently of the configuration in
The transfer rate and delay settings are described in
clock delay
46.5.1

Start and Stop of DSPI transfers

The DSPI has two operating states that are independent of DSPI configuration:
• STOPPED is the default DSPI state: no serial transfers are initiated in master mode
and no transfers are responded to in slave mode. The STOPPED state is also a safe
state for writing the various configuration registers of the DSPI without causing
undetermined results.
•
RUNNING is the state when serial transfers take place.
DSPI_SR[TXRXS] indicates what state the DSPI in ('1' = RUNNING state).
The DSPI is started (DSPI transitions to RUNNING) when all of the following conditions are
true:
•
SR[EOQF] bit is clear
•
MCU is not in the debug mode or the MCR[FRZ] bit is clear
•
MCR[HALT] bit is clear
The DSPI stops (transitions from RUNNING to STOPPED) after the current frame when any
one of the following conditions exist:
•
SR[EOQF] bit is set
•
MCU in the debug mode and the MCR[FRZ] bit is set
•
MCR[HALT] bit is set
State transitions from RUNNING to STOPPED occur on the next frame boundary if a
transfer is in progress, or immediately if no transfers are in progress.
1180/2058
Figure 613. SPI serial protocol overview
DSPI Master
Shift Register
Baud Rate
Generator
generation.
DocID027809 Rev 4
SIN
SOUT
SOUT SIN
SCK
SCK
SS
PCSx
Section 46.5.6: Transfer
Section 46.5.5: DSPI baud rate and
RM0400
DSPI Slave
Shift Register
formats.