Figure 814. Incomplete Response (For Example, Missing Checksum) - STMicroelectronics SPC572L series Reference Manual

LINFlexD
Note: Similarly, if the start of a falling edge of data is not detected by the transmitter node within
one bit time after start bit transmission, then a train of bit error interrupts are generated. In
this case also, data and checksum replacements in the BDR and CFR respectively are not
guaranteed.
50.3.2.5.3 Framing error
This error is flagged when a dominant state is sampled on the stop bit of the current
received character (sync field, identifier field, data field, checksum field). LINFlexD discards
the current frame and returns to Idle state. An interrupt is generated if the FEIE bit is set in
LINIER.
The byte that caused framing error is also shifted to the buffer but DRF or DBFF is never set
in this case.
50.3.2.5.4 Checksum error
This error is flagged when the checksum computed by hardware does not match the
received checksum.
LINFlexD discards the received frame and returns to Idle state. An interrupt is generated if
the CEIE bit is set in LINIER.
50.3.2.5.5 Overrun error
Once the message buffer is full (RMB is set), the next valid message reception will lead to
an overrun and the message will be lost. The hardware signals the overrun condition by
setting the BOF bit. Which message is lost depends on the buffer lock function control bit
RBLM.
If RBLM is cleared, the old message in the buffer is overwritten by the most recent
message. If RBLM bit is set, the most recent message is discarded and the oldest message
is available to the software. In the case of a slave, if the buffer is not released (RMB is not
reset) before reception of the next Identifier and if RBLM is set, then the ID along with the
data is discarded.
50.3.2.5.6 Timeout error
Header
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Figure 814. Incomplete response (for example, missing checksum)

Response Time-out
D2
D1
OC2
T
Response_Max
Frame slot
DocID027809 Rev 4
ERR
Header
RM0400
D1 D2
CRC