Offset Calibration Support - STMicroelectronics SPC572L series Reference Manual

RM0400
process. Dn is the average value of attenuated negative full scale given by
Dn = AVERAGE(CDR[CDATA]).
11. The SDADC calibrated gain can be calculated as:
12. The measured gain value can be used to nullify the gain errors in the digital output. For
calibrated conversion, the data CDR[CDATA] provided by the SDADC should be
normalized using the calculated gain: CDATA
CDR[CDATA]/Gain.
Note: The gain error calibration should only be done with gain equal to '1' (in other words, PGAN =
000). Nevertheless, the calculated gain can be applied to normalized data also for
conversion with GAIN>1.
Note: MCR[GECEN] = 1 ensures the accurate gain error mode is enabled. This bit should be set
both during calibration process and after calibration, for application data conversion.
Application data conversion must then be normalized using the measured gain.
Note: The higher the number of full-scale conversion (D
noise during the calibration. The number of conversion is dependent on application noise. It
is recommended to run at least 16 conversions when calculating an average value.
35.7.12

Offset calibration support

To perform offset calibration, the following sequence must be applied.
1. Select differential mode of operation by writing MCR[MODE] to '0'.
2. Configure the mux selection ANCHSEL field of CSR to '100' or '101' as required.
a)
b)
3. Disable the bias on all input analog channels by writing ENBIAS field of CSR to 0x00.
4. Disable the high pass filter by deasserting MCR[HPFEN].
5. Generate a reset event by writing 0x5AF0 to RESET_KEY of RKR.
6. Read the digital output stored in FIFO after the output settling time.
7. The measured offset can be used to nullify the offset error in the digital output.
Expected output is 0b00_0000_0000_0000. The SDADC offset can be calculated as:
Note: The offset must be calculated for each PGAN field setting since it is expected to vary with
gain configuration of SDADC.
35.8 Initialization information
To initialize the SDADC registers for data conversion, the following sequence is required.
Sigma-Delta Analog-to-Digital Converter (SDADC) Digital Interface
16
Gain = (D – D ) / 2
p n
CSR = '100' in case of data conversion after calibration in "single ended mode
with negative input = V
CSR = '101' in case of data conversion after calibration in "differential mode" and
"single ended mode with negative input = (V
Offset = Expected Output – Actual Output
DocID027809 Rev 4
norm
, D
p n
"
SS_HV_ADR_D
DD_HV_ADR_D
is given by CDATA
norm
) done, the higher the rejection of
–V
SS_HV_ADR_D
=
)/2"
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