Table 819. Slave Node — Tx Mode — Register Setting - STMicroelectronics SPC572L series Reference Manual

LINFlexD
TCD(n)
TCD(n + 1)
Linked chain
TCD(n + 2)
The TCD chain of the DMA Tx channel on a slave node supports:
• Slave to Master: transmission of the data field
•
Slave to Slave: transmission of the data field
The register setting of the LINCR2, IFER, IFMR, and IFCR registers is given in
LIN frame
DDRQ = 0
Slave to Master or
DTRQ = 0
Slave to Slave
HTRQ = 0
The concept FSM to control the DMA Tx interface is given in
moves to Idle state if DMATXE[x] = 0 where x = IFMI
given in Table
are allowed.
TCD field
CITER[14:0]
BITER[14:0]
NBYTES[31:0]
SADDR[31:0]
SOFF[15:0]
1446/2058
Figure 835. Slave node — TX memory map
RAM area
BDRL + BDRM
(4/8 bytes)
BDRL + BDRM
(8 bytes)
BDRL + BDRM
(4/8 bytes)
1 DMA TX channel/filter (TCD single and/or linked chain)
Table 819. Slave node — Tx mode — Register setting
LINCR2 IFER
To enable an ID filter (Tx
mode) for each DMA TX
channel
820. All other TCD fields = 0. TCD settings based on halfword or byte transfer
Table 820. TCD setting — Slave node — Tx mode
Value
1 Single iteration for the major loop
1 Single iteration for the major loop
Data buffer is filled with dummy bytes if length is not word-aligned
4/8 = N
BDRL + BDRM
— RAM address
4 Word increment
DocID027809 Rev 4
LINFlexD regs
DMA transfer
BDRL + BDRM
(4/8 bytes)
BDRL + BDRM
(8 bytes)
BDRL + BDRM
(4/8 bytes)
– Identifier list mode
– Identifier mask mode
Description
Slave → Master
Slave → Slave
IFMR
DFL = payload size
ID = address
CCS = checksum
DIR = 1 (TX)
Figure 836. DMA TX FSM
1. The TCD setting (word transfer) is
–
RM0400
Frame(n)
Extended
Frame(n + 1)
Extended
Frame(n + 2)
Table 819.
IFCR