Timestamp Generation - STMicroelectronics SPC572L series Reference Manual

CAN Subsystem
44.3.7.8.2 Internal Loop Back mode
Internal Loop Back mode is entered by programming bits TEST[LBCK] and CCCR[MON] to
one. This mode can be used for a "Hot Selftest", meaning the M_CAN can be tested without
affecting a running CAN system connected to the M_CAN Tx and Rx pins. In this mode
M_CAN Tx pin is disconnected from the M_CAN and M_CAN Tx pin is held recessive.
Figure 523
Loop Back mode.
44.3.8

Timestamp generation

For timestamp generation the M_CAN supplies a 16-bit wrap-around counter. A prescaler
TSCC[TCP] can be configured to clock the counter in multiples of CAN bit times (1...16).
The counter is readable via TSCV[TSC]. A write access to register TSCV resets the counter
to zero. When the timestamp counter wraps around interrupt flag IR[TSW] is set.
On start of frame reception / transmission the counter value is captured and stored into the
timestamp section of an Rx Buffer /Rx FIFO (RXTS[15:0]) or Tx Event FIFO (TXTS[15:0])
element.
1062/2058
Figure 522. External Loop Back mode
M_CAN
transmit output
shows the connection of M_CAN Tx pin and Rx to the M_CAN in case of Internal
Figure 523. Internal loop back mode
M_CAN
transmit output
DocID027809 Rev 4
M_CAN
receive input
RX
TX
M_CAN
M_CAN
receive input
=1
RX
TX
M_CAN
RM0400