Table 570. Tx Buffer Element Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
between dedicated Tx Buffers and Tx FIFO / Tx Queue by evaluating the Tx Buffer
configuration TXBC[TFQS] and TXBC[NDTB].
31
T0
T1 MM[7:0]
T2 DB3[7:0]
T3 DB7[7:0]
T0 Bit 30 XTD: Extended
Identifier
T0 Bit 29 RTR: Remote
Transmission Request
T0 Bits 28:0 ID[28:0]:
Identifier
T1 Bits 31:24 MM[7:0]:
Message Marker
T1 Bit 23 EFC
T1 Bits 19:16 DLC[3:0]
T2 Bits 31:24
T2 Bits 23:16
T2 Bits 15:8
T2 Bits 7:0
T3 Bits 31:24
T3 Bits 23:16
Figure 516. Tx Buffer Element
24 23
res DLC[3:0]
DB2[7:0]
DB6[7:0]

Table 570. Tx Buffer Element descriptions

0 11-bit standard identifier
1 29-bit extended identifier
0 Transmit data frame
1 Transmit remote frame
Standard or extended identifier depending on bit XTD. A standard identifier has to be
written to ID[28:18].
Written by CPU during Tx Buffer configuration. Copied into Tx Event FIFO element for
identification of Tx message status.
Event FIFO Control
0 Don't store Tx events
1 Store Tx events
Data Length Code
0-8 Transmit frame with 0-8 data bytes
9-15 Transmit frame with 8 data bytes
DB3[7:0]: Data Byte 3
DB2[7:0]: Data Byte 2
DB1[7:0]: Data Byte 1
DB0[7:0]: Data Byte 0
DB7[7:0]: Data Byte 7
DB6[7:0]: Data Byte 6
DocID027809 Rev 4
16 15
ID[28:0]
DB1[7:0]
DB5[7:0]
CAN Subsystem
8 7
res
DB0[7:0]
DB4[7:0]
1049/2058
0
1091