Features - STMicroelectronics SPC572L series Reference Manual

RM0400
24.1.2

Features

The MC_CGM includes the following features:
•
generates system and peripheral clocks
•
selects and enables/disables the system clock supply from system clock sources according to
MC_ME control
•
performs progressive system clock frequency change depending on MC_ME mode configuration
•
contains a set of registers to control clock dividers for divided clock generation
•
supports multiple clock sources and maps their address spaces to its memory map
•
guarantees glitch-less clock transitions when changing the system clock selection
•
supports 8-, 16-, and 32-bit wide read/write accesses
24.2 External signal description
The MC_CGM delivers output clocks to the and SYSCLK1 pins for off-chip use and/or observation.
24.3 Memory map and register definition
Offset
(Base
0xFFFB_
0700)
PCS Switch Duration Register
0x0000
(CGM_PCS_SDUR)
PCS Divider Change for external crystal
0x0004 oscillator (XOSC) Register
(CGM_PCS_DIVC1)
PCS Divider Start for external crystal
0x0008 oscillator (XOSC) Register
(CGM_PCS_DIVS1)
PCS Divider End for external crystal
0x000C oscillator (XOSC) Register
(CGM_PCS_DIVE1)
PCS Divider Change for PLL0 PHI Register
0x0010
(CGM_PCS_DIVC2)
PCS Divider Start for PLL0 PHI Register
0x0014
(CGM_PCS_DIVS2)
PCS Divider End for PLL0 PHI Register
0x0018
(CGM_PCS_DIVE2)
PCS Divider Change for PLL0 PHI1
0x001C
Register (CGM_PCS_DIVC3)
PCS Divider Start for PLL0 PHI1 Register
0x0020
(CGM_PCS_DIVS3)
Table 232. MC_CGM register description
Name
DocID027809 Rev 4
Clock Generation Module (MC_CGM)
Access
Size
User Supervisor
byte read read/write
word read read/write
word read read/write
word read read/write
word read read/write
word read read/write
word read read/write
word read read/write
word read read/write
Location
Test
read/write on page 499
read/write on page 500
read/write on page 500
read/write on page 501
read/write on page 502
read/write on page 502
read/write on page 503
read/write on page 504
read/write on page 504
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