Table 485. Gtmdi_Mcsa_Dc And Gtmdi_Mcsb_Dc Field Descriptions - STMicroelectronics SPC572L series Reference Manual

GTM Development Interface (GTMDI)

Table 485. GTMDI_MCSA_DC and GTMDI_MCSB_DC field descriptions

Field
MCSA/B Selection field. The MCSA/B_SEL[3:0] selection field selects which one of the MCS cores
in the GTM module are assigned as MCSA/B.
0000 MCS0
0001 MCS1
0010 Reserved
0011 Reserved
0100 Reserved
0101 Reserved
11–8
0110 Reserved
MCSA/B_SEL 0111 Reserved
1000 Reserved
1001 Reserved
1010 Reserved
1011 Reserved
1100 Reserved
1101 Reserved
1110 Reserved
1111 Reserved
42.5.1.28 MCSA/B watchpoint control register (GTMDI_MCSA_WPC and
GTMDI_MCSB_WPC)
The MCSA/B Watchpoint Control Registers shown in
MCSA/B watchpoints. These registers can be configured for halt/watchpoint based on
instruction fetch, data read or data write, with address and data masking options.
Note: Start/Stop signals inputs to the GTMDI can overwrite the state of the WMC control bit thus
controlling the Watchpoint messages behavior. In case of JTAG modifies the WMC bit and
Start/Stop signals occur at the same time also modifying the same bit, Start/Stop signals
have precedence over JTAG writes. The SEN control bit needs to be asserted in order to
allow external Start/Stop signals to control the WMC bit.
Note: The watchpoint channel selection is made through the GTMDI_MCSA_CE and
GTMDI_MCSB_CE by the WPCE field.
Register index: MCSA–62 / MCSB–79
31 30
R 0 0
W
RESET: 0 0
15 14
R
HWO
W
RESET: 0 0
Figure 433. MCSA/B watchpoint control register (GTMDI_MCSA_WPC and
Table 486
920/2058
29 28 27 26
0 0 0 0
0 0 0 0
13 12 11 10
0 0 0 0
0 0 0 0
describes the GTMDI_MCSA_WPC and GTMDI_MCSB_WPC register functions.
DocID027809 Rev 4
Description
Figure 433
25 24 23 22
0
HACH WMC
0 0 0 0
9 8 7 6
0 0
EOC HEN
0 0 0 0
GTMDI_MCSB_WPC)
are used to configure
21 20 19 18
0 0
HME
0 0 0 0
5 4 3 2
0 0
STSEL
0 0 0 0
RM0400
17 16
0 0
1 0
TEN SEN
0 0