Table 350. Sar Adcb Register Definitions - STMicroelectronics SPC572L series Reference Manual

RM0400
Table 349. SAR ADC external channel register descriptions (SARB only)(Continued)
Name
ECWENRn External Channel Watchdog Enable Registers
ECAWORRn External Channel Analog Watchdog Out of Range registers
ECMICRn External Channel Mapping to Internal Channel Registers
ECDR128–191 External Channel Data Registers 128–191
34.2.2.10.1 SAR ADCB register definitions
Name
SARADCB_MCR
SARADCB_MSR
SARADCB_ISR

Table 350. SAR ADCB register definitions

0 1 2 3
16 17 18 19
R 0
W
R 0 0 0 0
W
R 0 0 0 0
W
R CHADDR
W
R 0 0 0 0
W
R 0 0 0 0
W
DocID027809 Rev 4
Analog-to-digital converter (ADC) configuration
Description
27 5 6 7 8
20 21 22 23 24
JTRGSEL
0 0 0
0
0 0 0 0 0
0 0 0 0 0
User access
read/write
read/write
read/write
9 10 11 12 13
25 26 27 28 29
0
0 0 0
0 0 0 0
0 0 0 0 ADCSTATUS
0 0 0 0 0
0 0 0
w1 w1
c c
read
14 15
30 31
0 0
0
0 0
0 0
w1 w1
c c
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