Table 660. Alcr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

LVDS Fast Asynchronous Serial Transmission (LFAST) – Interprocessor Communications
Field
0-14 Reserved
Auto Loopback Frame Transmission Count Enable. Enables fixed number of auto predefined
15 loopback frame transmission.
LPCNTEN 0 Infinite predefined loopback frame transmission enabled
1 Fixed count of predefined loopback frame transmission enabled
Auto Loopback Frame Transmission Count. Defines the number of predefined auto loopback frames
to be sent. The predefined loopback frame has payload CBh, header 13h and valid sync. This mode
is valid if TMCR[LPMOD] = 011b or TMCR[LPMOD] = 100b.
0000h Reserved.(Not to be used)
16-31
0001h Send 1 frame with correct sync, header and payload
LPFMCNT
...
FFFEh Send 65534 frames with correct sync, header and payload
FFFFh Send 65535 frames with correct sync, header and payload
47.6.2.6 Rate Change Delay Control Register (RCDCR)
Offset:
0014h
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
1
Only writable when MCR[DRFEN] = 1.
Figure 646. Rate Change Delay Control Register (RCDCR)
Field
0-11 Reserved
Data Rate Controller Counter Value. Defines the number of cycles of Phase 0 clock needed by the
Tx interface Data rate change controller to switch from one speed mode to another. The arbitrator
ignores all requests during this period.
0h 0 cycles
12-15
1h 1 cycles
DRCNT
...
Eh 14 cycles
Fh 15 cycles
16-31 Reserved
1234/2058

Table 660. ALCR field descriptions

2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0 0
0 0 0 0
Table 661. RCDCR field description
DocID027809 Rev 4
Description
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0 0 0
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0
DRCNT
0 0 1 1
26 27 28 29
0 0 0 0
0 0 0 0
14 15
1
1 1
30 31
0 0
0 0