Functional Overview Using Examples - STMicroelectronics SPC572L series Reference Manual

RM0400
44.4.2

Functional overview using examples

The dynamic arbitration scheme is explained using the following examples.
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Example 1 (active CPU IF, 3 out of 3 CAN nodes are active):
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Example 2 (inactive CPU IF, 4 out of 4 CAN nodes are active):
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Example 3 (active CPU IF, 2 out of 4 CAN node are active):
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Example 4 (inactive CPU IF, 2 out of 4 CAN node are active):
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44.5 SRAM interface and memory organization
The CAN subsystem will interface with an external RAM using this interface. The RAM sizes
required for the CAN subsystem are summarized in the following sections.
44.5.1 Shared memory
The following table/s shows maximum possible configuration per Filter, FIFO and Buffer but
not all of these items can be configured to maximum size at the same time due to the
smaller implemented physical memory as listed in
Memory element
11-bit Filter
29-bit Filter
Rx FIFO 0
Rx FIFO 1
Rx Buffer
Tx Event FIFO
Tx Buffers
Please refer
CPU obtains every 2nd slot
CAN 1/2/3 obtains every 6th time slot
CPU obtains no time slots
CAN 1/2/3/4 obtains every 4th time slot
CPU obtains every 2nd time slot
Active CAN 1/2 obtains every 4th time slot
CPU obtains no time slots
Active CAN 1/2 obtains every 2nd time slot
Table 586. M_CAN message memory size
Number of elements
Table 587 for the available physical memory space used in the device.
DocID027809 Rev 4
Table
32-bit word per
element
128
64
64
64
64
32
32
M_CAN message memory size (word) 1216
CAN Subsystem
587.
Total 32-bit words
1
2
4
4
4
2
4
128
128
256
256
256
64
128
1087/2058
1091