Ecc Controller - STMicroelectronics SPC572L series Reference Manual

CAN Subsystem
44.5.2

ECC controller

The RAM embeds ECC logic and code to provide Single Error Correction / Double Error
Detection (SECCDED). The module does not guarantee any proper functionality if more
than 2 bits are in errors. It supports only 32-bit write access and 8-/16-/32-bit read access.
The ECC error is reported to each CAN module as well as available at the CAN subsystem
top, so that the same can be forwarded to the Error Management Module.
The module uses Hamming code for single error correction and double error detection logic.
It involves transmitting data with multiple ecc_check bits and decoding the associated
ecc_check bits when receiving data to detect errors. The SECDED Hamming code is not
able to detect three bit errors. Rather, in the presence of a three bit error, a conventional
SECDED code returns an error code that is indistinguishable from an error code resulting
from a single bit error. Hence, this module does not guarantee any proper functionality when
more than 2-bits are in error.
The ecc_check bits are parallel parity bits generated from XORing certain bits in the original
data word. If bit error(s) are introduced in the codeword, several ecc_check bits show parity
errors after decoding the retrieved codeword. The combination of these ecc_check bit errors
display the nature of the error. In addition, the position of any single bit error is identified
from the ecc_check bits.
The ECC error address is reported at the top of the subsystem using a 16 bit ECC error
address signal. This address is valid only when the ECC bit error output is valid.
44.5.2.1 Features
The ECC module supports the following:
•
ecc_error = 00 ' No error is detected in the read data from memory
•
ecc_error = 01 ' This indicates single bit error occurred within the 39-bit codeword. In
addition, the error is corrected, and the forwarded data to the master is error free.
•
ecc_error = 10 ' This indicates that a two bit error has occurred within the codeword. In
this case, no error correction is possible.
•
ecc_error = 11 ' This indicates that errors beyond the detection capability have
occurred within the codeword and no error correction is possible. This is an invalid
error type.
44.5.3 Transmit message buffer locking mechanism
Note: Please refer to Device Configuration chapter to see the number of CAN nodes used in the
device.
This block will implement a transmit message buffer locking mechanism using the CAN
nodes internal flags output.
The Host controller has to access the Message RAM for updating transmit message buffers
(e.g. the data section), the M_CAN controller needs access to the Message RAM to execute
acceptance and transmit filtering in time and to prepare the next message for transmission
by transferring it to the CAN core.
To avoid message buffer corruption, further host accesses to message buffers which are
requested for transmission should be prevented. Otherwise, if the Host updates a message
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