Flash Memory Controller Memory Map - STMicroelectronics SPC572L series Reference Manual

Flash memory controller (PFLASH Controller)
28.4

Flash memory controller memory map

28.4.1 Overview
The flash memory controller module provides an IPS programming model mapped to a
standard 16 KB on-platform peripheral slot. The programming model is partitioned into two
groups: flash access configuration and overlay remapping configuration.
The programming model can only be referenced using a 32-bit (word) access. Attempted
references using different access sizes or to undefined (reserved) addresses or in user
mode generates an IPS error termination. The flash controller allows access to the
programming model by all system bus masters.
The programming model can only be accessed in supervisor mode.
Attempted updates to the programming model while the flash memory controller module is
in the midst of an operation will result in non-deterministic behavior.
Address
offset
00x00 Platform Flash Configuration Register 1 (PFCR1)
0x008 Platform Flash Configuration Register 3 (PFCR3)
0x00c Platform Flash Access Protection Register (PFAPR)
Platform Flash Calibration Remap Control Register
0x010
(PFCRCR)
Platform Flash Calibration Remap Descriptor Enable
0x014
Register (PFCRDE)
0x100 Platform Flash Calibration Region Descriptor 0 (PFCRD0)
0x110 Platform Flash Calibration Region Descriptor 1 (PFCRD1)
0x120 Platform Flash Calibration Region Descriptor 2 (PFCRD2)
0x130 Platform Flash Calibration Region Descriptor 3 (PFCRD3)
0x140 Platform Flash Calibration Region Descriptor 4 (PFCRD4)
0x150 Platform Flash Calibration Region Descriptor 5 (PFCRD5)
0x160 Platform Flash Calibration Region Descriptor 6 (PFCRD6)
0x170 Platform Flash Calibration Region Descriptor 7 (PFCRD7)
0x180 Platform Flash Calibration Region Descriptor 8 (PFCRD8)
0x190 Platform Flash Calibration Region Descriptor 9 (PFCRD9)
0x1A0 Platform Flash Calibration Region Descriptor 10 (PFCRD10)
0x1B0 Platform Flash Calibration Region Descriptor 11 (PFCRD11)
0x1C0 Platform Flash Calibration Region Descriptor 12 (PFCRD12)
0x1D0 Platform Flash Calibration Region Descriptor 13 (PFCRD13)
0x1E0 Platform Flash Calibration Region Descriptor 14 (PFCRD14)
0x1F0 Platform Flash Calibration Region Descriptor 15 (PFCRD15)
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Table 283. Flash memory controller memory map
Register
DocID027809 Rev 4
Access Reset value
R/W 0x0000_0600
R/W 0x0000_0000
R/W 0x1111_1111
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
R/W 0x0000_0000
RM0400
Location
on page 559
on page 563
on page 564
on page 568
on page 569
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576
on page 576