Clocking
There are two GTM output clocks available on package pins, EXTCLK[2:1]. EXTCLK[1] is
muxed on the same pins as SYSCLK[1]. EXTCLK[2] is muxed on the same pin as the
Ethernet RMII clock (FEC_REF_CLK). The selection of EXTCLK[n], SYSCLK[n] or
FEC_REF_CLK is done in the SIUL2_MSCR registers and shown in
21.7
Clock monitoring
For all safety relevant clocks the microcontroller uses a clock monitoring unit (CMU) to
detect a missing clock or incorrect frequency. The IRCOSC and XOSC are used as the
clock monitor references. Detailed information on the CMU can be found in the Clock
Monitor Unit chapter.
21.7.1
CMU configuration
This section explains the CMU configuration.
Figure 168
474/2058
Figure 167. SYSCLK/EXTCLK/REF_CLK pin muxing
GTM
MC_CGM
FEC_REF_CLK
shows the block diagram for CMU0 on the SPC572Lx.
DocID027809 Rev 4
SIUL2_MSCR
EXTCLK1
SYSCLK1
iomux
SIUL2_MSCR
EXTCLK2
iomux
Figure
167.
EXTCLK1/SYSCLK1
I/O Pad
EXTCLK2/REFCLK
I/O Pad
RM0400
Need help?
Do you have a question about the SPC572L series and is the answer not in the manual?