Direct Memory Access Multiplexer (DMAMUX)
Source #1
Source #2
Source #3
Source #x
Always #1
Always #y
The DMA channel triggering capability allows the system to schedule regular DMA
transfers, usually on the transmit side of certain peripherals, without the intervention of the
processor. This trigger works by gating the request from the peripheral to the DMA until a
trigger event has been seen. This is illustrated in
Periph request
Trigger
DMA request
After the DMA request has been serviced, the peripheral will negate its request, effectively
resetting the gating mechanism until the peripheral re-asserts its request and the next
trigger event is seen. This means that if a trigger is seen, but the peripheral is not requesting
a transfer,then that trigger will be ignored. This situation is illustrated in
454/2058
Figure 158. DMAMUX triggered channels
Figure 159. DMAMUX channel triggering: normal operation
DocID027809 Rev 4
Trigger #1
Trigger #m
Figure
159.
RM0400
DMA channel #0
DMA channel #m-1
Figure
160.
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