Table 556. Rx Fifo 1 Acknowledge Register Field Descriptions - STMicroelectronics SPC572L series Reference Manual

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Table 555. Rx FIFO 1 Status register field descriptions(Continued)
Field
Rx FIFO 1 Message Lost
6
This bit is a copy of interrupt flag IR[RF1L]. When IR[RF1L] is reset, this bit is also reset.
RF1L
0 No Rx FIFO 1 message lost
1 Rx FIFO 1 message lost, also set after write attempt to Rx FIFO 1 of size zero
Rx FIFO 1 Full
7
0 Rx FIFO 1 not full
F1F
1 Rx FIFO 1 full
8:9
Reserved
10:15
Rx FIFO 1 Put Index
F1P1
Rx FIFO 1 write index pointer, range 0 to 63.
16:17
Reserved
18:23
Rx FIFO 1 Get Index
F1G1
Rx FIFO 1 read index pointer, range 0 to 63.
24
Reserved
25:31
Rx FIFO 1 Fill Level
F1FL
Number of elements stored in Rx FIFO 1, range 0 to 64.
44.3.5.2.31 Rx FIFO 1 Acknowledge Register (RXF1A)
Address: 0x00B8
0
1
2
R
0
0
0
W
Reset
0
0
0
16
17
18
R
0
0
0
W
Reset
0
0
0

Table 556. Rx FIFO 1 Acknowledge register field descriptions

Field
0:25
Reserved
Rx FIFO 1 Acknowledge Index
26:31
After the Host has read a message or a sequence of messages from Rx FIFO 1 it has to write the
F1AI
buffer index of the last element read from Rx FIFO 1 to F1AI. This will set the Rx FIFO 1 Get Index
RXF1S[F1GI] to F1AI + 1 and update the FIFO 1 Fill Level RXF1S[F1FL].
3
4
5
6
0
0
0
0
0
0
0
0
19
20
21
22
0
0
0
0
0
0
0
0
Figure 501. Rx FIFO 1 Acknowledge register
DocID027809 Rev 4
Description
7
8
9
10
0
0
0
0
0
0
0
0
23
24
25
26
0
0
0
0
0
0
0
Description
CAN Subsystem
Access: RW
11
12
13
14
0
0
0
0
0
0
0
0
27
28
29
30
F1AI
0
0
0
0
1037/2058
15
0
0
31
0
1091

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