Table 803. Dma_Fmsg_Ts Field Descriptions - STMicroelectronics SPC572L series Reference Manual

SENT Receiver (SRX)
Address Offset: 0x0048
0
R
W
Reset 0
8
R
W
Reset 0
16
R
W
Reset 0
24
R
W
Reset 0
Figure 791. DMA Fast Message Time Stamp Read Register (DMA_FMSG_TS)
Field
Time Stamp for received message. Indicates the relative time when the falling edge that comes at
0:31
the end of the calibration pulse (which is also the start of the status and communication nibble pulse)
TS
was detected
49.3.2.15 DMA Slow Serial Message Bit3 Read Register (DMA_SMSG_BIT3)
The above register (DMA_SMSG_BIT3) is common for all types of slow serial messages.
Bit C defines the type of enhanced packet and bit TYPE defines whether it is short serial or
enhanced serial message. Since this register is used to read both Short and Enhanced
Serial Messages, the register fields have been placed in such a way to match the bit
positions in actual message defined by SAE Specification as shown in
Figure 801
messages format to be used when reading this register for these two types of messages.
Figure 802
DMA Source Size must be set to 32 bits when reading this register via DMA.
1384/2058
1 2
0 0
9 10
0 0
17 18
0 0
25 26
0 0

Table 803. DMA_FMSG_TS field descriptions

and Figure 802. Figure 800
shows the short serial message.
DocID027809 Rev 4
3 4
TS [31:24]
0 0
11 12
TS [23:16]
0 0
19 20
TS [15:8]
0 0
27 28
TS [7:0]
0 0
Description
and Figure 801 shows the enhanced serial
Access: R
5 6
0 0
13 14
0 0
21 22
0 0
29 30
0 0
Figure 800,
RM0400
7
0
15
0
23
0
31
0