Dspi Dsi Configuration Register 0 (Dspi_Dsicr0) - STMicroelectronics SPC572L series Reference Manual

Deserial Serial Peripheral Interface (DSPI)
Address: Base + 0x007C
0 1
R
W
Reset 0 0
16 17
R
W
Reset 0 0
Field
0–31 Receive Data
RXDATA Contains the received SPI data.
46.3.12

DSPI DSI Configuration Register 0 (DSPI_DSICR0)

DSICR0 selects various attributes associated with DSI and CSI Configurations.
Do not write to the DSICR0 while the DSPI is in the Running state.
Address: Base + 0x00BC
0 1
R
W
Reset 0 0
16 17
R
DSICTAS[2:0]
W
Reset 0 0
Figure 595. DSPI DSI Configuration Register 0 (DSPI_DSICR0)
1. This bit is reserved if the device does not have a hardware trigger input signal (HT).
1164/2058
2 3 4 5
0 0 0 0
18 19 20 21
0 0 0 0
Figure 594. DSPI Receive FIFO Registers (DSPI_RXFRn)
Table 623. DSPI_RXFRn field descriptions
2 3 4 5
Reserved
0 0 0 0
18 19 20 21
DMS PES
0 0 0 0
DocID027809 Rev 4
6 7 8 9
RXDATA
0 0 0 0
22 23 24 25
RXDATA
0 0 0 0
Description
6 7 8 9
0 0 0 0
22 23 24 25
PE PP
0 0 0 0
Access: User read-only
10 11 12 13
0 0 0 0
26 27 28 29
0 0 0 0
Access: User read/write
10 11 12 13
ITSB
0 0 0 0
26 27 28 29
DPCSx
0 0 0 0
RM0400
14 15
0 0
30 31
0 0
14 15
CID
0 0
30 31
0 0