Error Reporting And Handling - STMicroelectronics SPC572L series Reference Manual

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RM0400
e D M A E n g i n e
Read Data
Write Data
Address
19.4.3

Error reporting and handling

Channel errors are reported in the ES register and can be caused by:
A configuration error (an illegal setting in the transfer-control descriptor or an illegal
priority register setting in Fixed Arbitration mode),
An uncorrectable ECC error, or
An error termination to a bus master read or write cycle.
A configuration error is reported when the starting source or destination address, source or
destination offsets, minor loop byte count, or the transfer size represent an inconsistent
state. Each of these possible causes are detailed in the list below:
The addresses and offsets must be aligned on 0-modulo-transfer-size boundaries.
The minor loop byte count must be a multiple of the source and destination transfer
sizes.
All source reads and destination writes must be configured to the natural boundary of
the programmed transfer size, respectively.
In Fixed Arbitration mode, a configuration error is caused by any two channel priorities
being equal within a group, or any group priority levels being equal among the groups.
Enhanced Direct Memory Access (eDMA)
Figure 153. DMA operation, part 3
Transfer
Control
Descriptor (TCD)
eDMA Peripheral
Request
DocID027809 Rev 4
Write Address
Write Data
Read Data
eDMA Done
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