Dma Programming Errors - STMicroelectronics SPC572L series Reference Manual

Enhanced Direct Memory Access (eDMA)
Figure 155
19.5.2

DMA programming errors

The eDMA performs various tests on the transfer control descriptor to verify consistency in
the descriptor data. Most programming errors are reported on a per-channel basis with the
exception of channel priority error (ES[CPE]).
For all error types other than channel priority errors, the channel number causing the error is
recorded in the ES register. If the error source is not removed before the next activation of
the problem channel, the error is detected and recorded again.
If priority levels are not unique, when any channel requests service, a channel priority error
is reported. The highest (channel/group) priority with an active request is selected, but the
lowest numbered (channel/group) with that priority is selected by arbitration and executed
by the eDMA engine. The hardware service request handshake signals, error interrupts, and
error reporting is associated with the selected channel.
19.5.3 DMA Arbitration mode considerations
This section discusses arbitration considerations for the eDMA.
19.5.3.1 Fixed-channel arbitration
In this mode, the channel service request from the highest priority channel is selected to
execute. The advantage of this scenario is that latency can be small for channels that need
to be serviced quickly. Preemption is available in this scenario only.
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lists the memory array terms and how the TCD settings interrelate.
Figure 155. Memory array terms
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