Table 832. Lintcsr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Address
0018h
:
0 1
R 0 0
W
Reset 0 0
16 17
R 0 0
W
Reset 0 0
1
This field can be read in any modes and written only in Initialization mode.
Figure 851. LIN Time-Out Control Status Register (LINTCSR)
Field
Reserved
0–20
Read returns 0.
Time-out counter mode
21
0 LIN mode
1 Output compare mode
MODE
This bit can be configured only during initialization.
Idle on timeout
22
0 LIN state machine does not reset to Idle on timeout
IOT 1 LIN state machine resets to Idle on timeout event
This feature is applicable only when MODE bit in LINTCSR is cleared.
Time-out counter enable
0 Time-out counter disable
OCF flag is not set on an output compare event.
23
1 Time-out counter enable
TOCE
OCF flag is set if an output compare event occurs.
TOCE is always configurable by software in Initialization mode. If LIN state is other than INIT and
if timer is configured in LIN mode, then hardware takes control of TOCE.
Counter Value
24–31 These bits reflect the value of a free-running counter used for timeout.
CNT[0:7]
Note: For proper functionality of this counter, LINIBRR should be > 5.
50.4.2.8 LIN Output Compare Register (LINOCR)
This register contains the value to be compared to the LINTOCR value. This register is
writable by software only in Output Compare Mode.
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0 0 0
0 0 0 0

Table 832. LINTCSR field descriptions

DocID027809 Rev 4
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
1
IOT
1 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
CNT
0 0 0 0
LINFlexD
14 15
0 0
0 0
30 31
0 0
1475/2058
1506