Table 839. Bidr Field Descriptions - STMicroelectronics SPC572L series Reference Manual

LINFlexD
Field
Header Transmission Request
Set by software to request the transmission of the LIN Header.
Cleared by hardware when the request has been completed or on abort request. This bit has no
23
effect in UART mode.
HTRQ
Note: In master mode, if both HTRQ and ABRQ are set at the same time then ABRQ has no effect.
Reserved
24–31
Read returns 0.
50.4.2.14 Buffer Identifier Register (BIDR)
This register contains the bits which provide information about the identifier of the
transaction and other related information.
Note: All the fields (ID, CSS, DIR, DFL) of the BIDR register must be updated when an ID filter
(enabled) in Slave mode (Tx or Rx) matches the ID received.
Address
0034h
:
0 1
R 0 0
W
Reset 0 0
16 17
R
W
Reset 0 0
Field
Reserved
0–15
Read returns 0.
Data Field Length
Number of data bytes in the response part of the frame.
16–21
DFL[5:0] = Number of data bytes – 1
DFL[5:0]
Note: DFL[5:3] is provided for extended frames. Normally LIN mode will use DFL[2:0]. Identifier
1482/2058
Table 838. LINCR2 field descriptions(Continued)
Similarly, in slave mode after header reception, if DTRQ and ABRQ are simultaneously set
then ABRQ has no effect.
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
DFL
0 0 0 0
Figure 858. Buffer Identifier Register (BIDR)

Table 839. BIDR field descriptions

filters are now compatible with DFL[5:0] also.
DocID027809 Rev 4
Description
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0 0
DIR CCS
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
ID
0 0 0 0
RM0400
14 15
0 0
0 0
30 31
0 0