Table 827. Linier Field Descriptions - STMicroelectronics SPC572L series Reference Manual

RM0400
Address
0004h
:
0 1
R 0 0
W
Reset 0 0
16 17
R
SZIE OCIE BEIE CEIE HEIE
W
Reset 0 0
Field
Reserved
0–15
Read returns 0.
Stuck at Zero Interrupt Enable
0 No interrupt
16
1 Interrupt enabled
SZIE
An interrupt is generated if this bit is set and the Stuck at Zero Flag (SZF) in LINESR or UARTSR
is set.
Output Compare Interrupt Enable
17
0 No interrupt
OCIE
1 Interrupt generated when OCF bit in LINESR or UARTSR is set
Bit Error Interrupt Enable
18
0 No interrupt
BEIE
1 Interrupt generated when BEF bit in LINESR is set
Checksum Error Interrupt Enable
19
0 No interrupt
1 Interrupt enabled
CEIE
An interrupt is generated if this bit is set and the Checksum Error Flag (CEF) is set in LINESR.
Header Error Interrupt Enable
0 No interrupt
1 Interrupt enabled
20
An interrupt is generated when this bit is set and either of the following flags are set SFEF, SDEF,
HEIE
IDPEF in LINESR are set.
Note: If generic slave = 0, then this bit will always read a 0 and cannot be programmed.
Reserved
21–22
Read returns 0.
Frame Error Interrupt Enable
23
0 No interrupt
FEIE
1 Interrupt generated if Frame Error Flag (FEF) bit is set in LINESR or UARTSR
2 3 4 5
0 0 0 0
0 0 0 0
18 19 20 21
0
0 0 0 0
Figure 846. LIN Interrupt enable register (LINIER)

Table 827. LINIER field descriptions

DocID027809 Rev 4
6 7 8 9
0 0 0 0
0 0 0 0
22 23 24 25
0
FEIE BOIE LSIE
0 0 0 0
Description
Access: User read/write
10 11 12 13
0 0 0 0
0 0 0 0
26 27 28 29
DRIE DTIE HRIE
0 0 0 0
LINFlexD
14 15
0 0
0 0
30 31
0 0
1461/2058
1506